JP6509885B2 - 半導体チップの端子を有するdc−dcコンバータ - Google Patents
半導体チップの端子を有するdc−dcコンバータ Download PDFInfo
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- JP6509885B2 JP6509885B2 JP2016550585A JP2016550585A JP6509885B2 JP 6509885 B2 JP6509885 B2 JP 6509885B2 JP 2016550585 A JP2016550585 A JP 2016550585A JP 2016550585 A JP2016550585 A JP 2016550585A JP 6509885 B2 JP6509885 B2 JP 6509885B2
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- chip
- fet
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- pad
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10W90/00—Package configurations
- H10W90/811—Multiple chips on leadframes
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/411—Chip-supporting parts, e.g. die pads
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- H10W70/40—Leadframes
- H10W70/464—Additional interconnections in combination with leadframes
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- H10W70/40—Leadframes
- H10W70/464—Additional interconnections in combination with leadframes
- H10W70/466—Tape carriers or flat leads
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- H10W70/40—Leadframes
- H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
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- H10W74/00—Encapsulations, e.g. protective coatings
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- H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
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- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
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- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
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- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07336—Soldering or alloying
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- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
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- H10W72/076—Connecting or disconnecting of strap connectors
- H10W72/07631—Techniques
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- H10W72/00—Interconnections or connectors in packages
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- H10W72/321—Structures or relative sizes of die-attach connectors
- H10W72/325—Die-attach connectors having a filler embedded in a matrix
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- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
- H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
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- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
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- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
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- H10W72/00—Interconnections or connectors in packages
- H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
- H10W72/651—Materials of strap connectors
- H10W72/652—Materials of strap connectors comprising metals or metalloids, e.g. silver
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- H10W72/00—Interconnections or connectors in packages
- H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
- H10W72/651—Materials of strap connectors
- H10W72/655—Materials of strap connectors of outermost layers of multilayered strap connectors, e.g. material of a coating
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- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/853—On the same surface
- H10W72/871—Bond wires and strap connectors
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- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
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- H10W90/00—Package configurations
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- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
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- H10W90/00—Package configurations
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- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
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- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
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- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
- H10W90/763—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between laterally-adjacent chips
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
- H10W90/766—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Dc-Dc Converters (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/173,147 | 2014-02-05 | ||
| US14/173,147 US9184121B2 (en) | 2014-02-05 | 2014-02-05 | Stacked synchronous buck converter having chip embedded in outside recess of leadframe |
| US14/481,204 | 2014-09-09 | ||
| US14/481,204 US9171828B2 (en) | 2014-02-05 | 2014-09-09 | DC-DC converter having terminals of semiconductor chips directly attachable to circuit board |
| PCT/US2015/014655 WO2015120173A1 (en) | 2014-02-05 | 2015-02-05 | Dc-dc converter having terminals of semiconductor chips |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017506432A JP2017506432A (ja) | 2017-03-02 |
| JP2017506432A5 JP2017506432A5 (enExample) | 2018-03-15 |
| JP6509885B2 true JP6509885B2 (ja) | 2019-05-08 |
Family
ID=53755485
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016550585A Active JP6509885B2 (ja) | 2014-02-05 | 2015-02-05 | 半導体チップの端子を有するdc−dcコンバータ |
Country Status (5)
| Country | Link |
|---|---|
| US (4) | US9171828B2 (enExample) |
| EP (1) | EP3130009B1 (enExample) |
| JP (1) | JP6509885B2 (enExample) |
| CN (2) | CN105981170B (enExample) |
| WO (1) | WO2015120173A1 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8426952B2 (en) * | 2011-01-14 | 2013-04-23 | International Rectifier Corporation | Stacked half-bridge package with a common conductive leadframe |
| JP6265415B2 (ja) * | 2014-01-24 | 2018-01-24 | 住友電工デバイス・イノベーション株式会社 | 増幅装置 |
| US9171828B2 (en) * | 2014-02-05 | 2015-10-27 | Texas Instruments Incorporated | DC-DC converter having terminals of semiconductor chips directly attachable to circuit board |
| US20170018487A1 (en) * | 2015-07-15 | 2017-01-19 | Broadcom Corporation | Thermal enhancement for quad flat no lead (qfn) packages |
| JP6011737B1 (ja) * | 2016-03-14 | 2016-10-19 | 富士電機株式会社 | 降圧チョッパ回路 |
| JP6011736B1 (ja) * | 2016-03-14 | 2016-10-19 | 富士電機株式会社 | 昇圧チョッパ回路 |
| FR3073080B1 (fr) * | 2017-10-26 | 2021-01-08 | St Microelectronics Srl | Circuit integre en boitier qfn |
| CN108345712B (zh) * | 2018-01-10 | 2021-10-15 | 杭州士兰集成电路有限公司 | 计算半导体器件的频率与电流关系的方法和装置 |
| US11476232B2 (en) | 2019-03-25 | 2022-10-18 | Analog Devices International Unlimited Company | Three-dimensional packaging techniques for power FET density improvement |
| JP6709313B1 (ja) * | 2019-05-31 | 2020-06-10 | アオイ電子株式会社 | 半導体装置および半導体装置の製造方法 |
| US11024564B2 (en) | 2019-06-19 | 2021-06-01 | Texas Instruments Incorporated | Packaged electronic device with film isolated power stack |
| US11742267B2 (en) * | 2020-10-12 | 2023-08-29 | Toyota Motor Engineering And Manufacturing North America, Inc. | Power electronics assembly having flipped chip transistors |
| EP4057341A1 (en) * | 2021-03-12 | 2022-09-14 | Nexperia B.V. | Packaged half-bridge circuit |
| DE102021133665A1 (de) | 2021-12-17 | 2023-06-22 | Infineon Technologies Ag | Halbleitervorrichtung mit einem Premolded-Leadframe und einem Halbleiterpackage |
| US12261101B2 (en) * | 2022-06-28 | 2025-03-25 | Alpha And Omega Semiconductor International Lp | Semiconductor package having wettable lead flanks and tie bars and method of making the same |
| IT202300006201A1 (it) * | 2023-03-30 | 2024-09-30 | St Microelectronics Int Nv | Modulo di potenza multi-livello con effetti parassitici ridotti |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11260996A (ja) * | 1998-03-16 | 1999-09-24 | Matsushita Electron Corp | 光学半導体装置とその製造方法 |
| JP2002252322A (ja) * | 2001-02-21 | 2002-09-06 | Sony Corp | 電子部品実装基板及びその製造方法 |
| US6946740B2 (en) * | 2002-07-15 | 2005-09-20 | International Rectifier Corporation | High power MCM package |
| US7579697B2 (en) | 2002-07-15 | 2009-08-25 | International Rectifier Corporation | Arrangement for high frequency application |
| CN101807533B (zh) * | 2005-06-30 | 2016-03-09 | 费查尔德半导体有限公司 | 半导体管芯封装及其制作方法 |
| US20090194857A1 (en) * | 2008-02-01 | 2009-08-06 | Yong Liu | Thin Compact Semiconductor Die Packages Suitable for Smart-Power Modules, Methods of Making the Same, and Systems Using the Same |
| US7952204B2 (en) * | 2008-04-14 | 2011-05-31 | Fairchild Semiconductor Corporation | Semiconductor die packages with multiple integrated substrates, systems using the same, and methods using the same |
| US8148815B2 (en) | 2008-10-13 | 2012-04-03 | Intersil Americas, Inc. | Stacked field effect transistor configurations |
| EP2393113A4 (en) * | 2009-01-28 | 2013-04-24 | Hitachi Metals Ltd | SEMICONDUCTOR COMPONENT AND POWER SUPPLY CIRCUIT FOR THIS |
| US8358014B2 (en) * | 2009-05-28 | 2013-01-22 | Texas Instruments Incorporated | Structure and method for power field effect transistor |
| CN102169873B (zh) * | 2010-02-25 | 2013-12-11 | 万国半导体有限公司 | 一种应用于功率切换器电路的半导体封装结构 |
| US20110210708A1 (en) * | 2010-03-01 | 2011-09-01 | Texas Instruments Incorporated | High Frequency Power Supply Module Having High Efficiency and High Current |
| US8513784B2 (en) * | 2010-03-18 | 2013-08-20 | Alpha & Omega Semiconductor Incorporated | Multi-layer lead frame package and method of fabrication |
| JP5099243B2 (ja) * | 2010-04-14 | 2012-12-19 | 株式会社デンソー | 半導体モジュール |
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| US20120228696A1 (en) | 2011-03-07 | 2012-09-13 | Texas Instruments Incorporated | Stacked die power converter |
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-
2014
- 2014-09-09 US US14/481,204 patent/US9171828B2/en active Active
-
2015
- 2015-02-05 WO PCT/US2015/014655 patent/WO2015120173A1/en not_active Ceased
- 2015-02-05 CN CN201580007418.8A patent/CN105981170B/zh active Active
- 2015-02-05 JP JP2016550585A patent/JP6509885B2/ja active Active
- 2015-02-05 EP EP15746937.0A patent/EP3130009B1/en active Active
- 2015-02-05 CN CN201911107083.3A patent/CN110911377B/zh active Active
- 2015-07-16 US US14/800,903 patent/US9305872B2/en active Active
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2016
- 2016-04-04 US US15/090,176 patent/US9543240B2/en active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| WO2015120173A1 (en) | 2015-08-13 |
| US20170077017A1 (en) | 2017-03-16 |
| EP3130009A4 (en) | 2018-03-28 |
| JP2017506432A (ja) | 2017-03-02 |
| US9543240B2 (en) | 2017-01-10 |
| US20160218054A1 (en) | 2016-07-28 |
| EP3130009B1 (en) | 2020-10-28 |
| CN105981170A (zh) | 2016-09-28 |
| US20150318233A1 (en) | 2015-11-05 |
| CN105981170B (zh) | 2019-12-10 |
| US10930582B2 (en) | 2021-02-23 |
| CN110911377A (zh) | 2020-03-24 |
| EP3130009A1 (en) | 2017-02-15 |
| US9171828B2 (en) | 2015-10-27 |
| US20150221622A1 (en) | 2015-08-06 |
| US9305872B2 (en) | 2016-04-05 |
| CN110911377B (zh) | 2022-07-22 |
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