CN101681897B - 双侧冷却集成功率装置封装和模块及其制造方法 - Google Patents

双侧冷却集成功率装置封装和模块及其制造方法 Download PDF

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Publication number
CN101681897B
CN101681897B CN200880016686.6A CN200880016686A CN101681897B CN 101681897 B CN101681897 B CN 101681897B CN 200880016686 A CN200880016686 A CN 200880016686A CN 101681897 B CN101681897 B CN 101681897B
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lead frame
module
section
attached
frame structure
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CN101681897A (zh
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乔纳森·A·诺奎尔
鲁宾·马德里
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Fairchild Semiconductor Corp
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Fairchild Semiconductor Corp
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Abstract

本发明提供一种集成功率装置模块，其具有：引线框架结构，其具有第一和第二分隔垫以及位于所述第一与第二垫之间的一个或一个以上共同源极‑漏极引线；第一和第二晶体管，其分别以倒装芯片形式附接到所述第一和第二垫，其中所述第二晶体管的源极电连接到所述一个或一个以上共同源极‑漏极引线；以及第一线夹，其附接到所述第一晶体管的漏极且电连接到所述一个或一个以上共同源极‑漏极引线。在另一实施例中，本发明提供一种部分包封的功率四面扁平无引线封装，其具有：暴露的顶部热漏极线夹，其大体上垂直于所述折叠支柱暴露的顶部热漏极线夹；以及暴露的热源极垫。

Description

双侧冷却集成功率装置封装和模块及其制造方法
相关申请案的交叉参考
本申请案主张2007年7月27日申请的第11/829,793号美国专利申请案的优先权。
技术领域
本发明大体上涉及半导体装置的封装，且更特定来说，涉及双侧冷却集成功率装置模块及其制造方法。
背景技术
具有短引线的用于半导体的小封装对于形成紧凑的电子电路来说是合意的。然而，此类小封装在从电子电路中所使用的经封装功率装置耗散热量的方面产生问题。在许多情况下，仅引线的热量耗散能力不足以提供功率装置的可靠操作。在过去，已将散热片附接到此类装置以帮助耗散热量。
形成紧凑电路的另一因素是在常规封装中需用于线接合的空间量。因此，将需要提供一种用于功率装置的封装，其有效地耗散热量，同时最小化电路板上用于所述封装的区域量。
在此类电路中发现作为同步降压转换器的具有共同高电流输入或输出端子的两个功率装置的布置。同步降压转换器通常用作用于手机、便携式计算机、数码相机、路由器或其它便携式电子装置的电源。同步降压转换器将DC电压电平移位以便将功率提供给可编程栅格阵列集成电路、微处理器、数字信号处理集成电路和其它电路，同时稳定电池输出、过滤噪声并减少波动。这些装置还用于在广泛范围的数据通信、电信、负载点和计算应用中提供高电流多相功率。
图1展示典型的同步降压转换器10的框图。所述转换器具有由脉宽调制(PWM)IC16驱动的高侧FET 12和低侧FET 14。Q1和Q2装置12、14可被配置成离散装置，其需要最佳布局以减少由印刷电路板(PCB)上的高侧FET 12的源极到低侧FET 14的漏极的连接引起的寄生电阻18和电感20。
发明人为久石(Joshi)等人的2005年12月29日公开的第2005/0285238A1号美国专利申请公开案揭示一种集成晶体管模块，其包含界定低侧焊盘和高侧焊盘的引线框架结构。低侧晶体管安装在低侧焊盘上，其中其漏极电连接到低侧焊盘。高侧晶体管安装在高侧焊盘上，其中其源极电连接到高侧焊盘。引线框架结构的台阶部分电连接低侧焊盘和高侧焊盘，且因此还连接低侧晶体管的漏极与高侧晶体管的源极。
虽然后者公开的专利公开案的集成晶体管模块对于既定的应用是有用的，但模块占地面积却不是业界中常见的占地面积。
因此，需要一种改进的集成功率装置模块，其可用于例如同步降压转换器电路等电路中，所述电路提供对这些问题的解决方案。
发明内容
根据本发明，提供对这些问题的解决方案。
根据本发明的特征，提供一种集成功率装置模块，其包括：
引线框架结构，其具有第一和第二分隔垫以及位于所述第一与第二垫之间的一个或一个以上共同源极-漏极引线；
第一和第二晶体管，其分别以倒装芯片形式附接到所述第一和第二垫，其中所述第二晶体管的源极电连接到所述一个或一个以上共同源极-漏极引线；以及
第一线夹，其附接到所述第一晶体管的漏极且电连接到所述一个或一个以上共同源极-漏极引线。
根据本发明的另一特征，提供一种集成功率装置模块，其包括：
引线框架结构，其具有第一和第二分隔垫、位于所述第一与第二垫之间的一个或一个以上共同源极-漏极引线以及位于所述第二垫的外侧上的一个或一个以上漏极引线；
第一和第二晶体管，其分别以倒装芯片形式附接到所述第一和第二垫，其中所述第二晶体管的源极电连接到所述一个或一个以上共同源极-漏极引线；
第一线夹，其附接到所述第一晶体管的漏极且电连接到所述一个或一个以上共同源极-漏极引线；
第二线夹，其附接到所述第二晶体管的漏极且电连接到位于所述第二垫的外侧上的所述一个或一个以上漏极引线；以及
模制材料，其包封所述引线框架结构、所述晶体管和所述线夹以形成所述模块。
根据本发明的再一特征，提供一种制造集成功率装置模块的方法，其包括：
提供引线框架结构，其具有第一和第二分隔垫、位于所述垫之间的一个或一个以上共同源极-漏极引线以及位于所述第二垫的外侧上的一个或一个以上漏极引线；
分别将第一和第二晶体管以倒装芯片形式附接到所述第一和第二垫，其中所述第二晶体管的源极电连接到所述一个或一个以上共同源极-漏极引线；
将第一线夹附接到所述第一晶体管的漏极，且将所述第一线夹电连接到所述一个或一个以上共同源极-漏极引线；
将第二线夹附接到所述第二晶体管的漏极，且将所述第二线夹电连接到位于所述第二垫的外侧上的所述一个或一个以上漏极引线；以及
用模制材料包封所述引线框架结构、所述晶体管和所述线夹以形成所述模块。
根据本发明的又一特征，提供一种部分包封的半导体封装，其具有：暴露的顶部热线夹，其具有大体上垂直于所述热线夹的暴露顶部部分的多个折叠弯曲部分；以及暴露的热引线框架结构垫。
根据本发明的再一特征，提供一种通过以下操作来制造部分包封的半导体封装的方法：提供共面引线框架结构，其具有三个单独区段：控制区段、第一高电流区段和第二高电流区段；将半导体装置附接到所述控制区段和所述第一电流区段两者；将线夹附接到所述半导体装置的与引线框架结构相对的侧，所述线夹具有多个弯曲部分，所述多个弯曲部分附接到所述第二电流区段；以及用模制材料部分包封所述引线框架结构、所述半导体装置和所述线夹以形成所述封装。
附图说明
从结合附图所作的以下更详细描述中大体上将更好地理解前述和其它特征、特性、优点和本发明，附图中：
图1是典型同步降压转换器电路的示意图。
图2A是根据本发明的一个实施例的用于形成双侧冷却集成功率装置模块的类型的两个引线框架结构的平面图；
图2B是根据本发明的一个实施例的图2A中所示的引线框架结构的平面图，其中晶体管裸片接合到所述引线框架结构；
图2C是根据本发明的一个实施例的图2A的引线框架结构的平面图，其中两个冷却线夹附接到图2A中所示的引线框架结构和图2B中所示的晶体管裸片；
图3A、3B和3C是图2C中所示的结构在所述结构已被部分包装在包封材料中之后的相应俯视平面图、横截面侧视图和仰视平面图；
图4A是根据本发明的另一实施例的双侧冷却集成功率装置模块的仰视平面图；
图4B是图4A中所示的模块的一个实施例的横截面侧视图；
图4C是图4A中所示的模块的另一实施例的横截面侧视图；
图5是根据本发明的又一实施例的带引线的双侧冷却集成功率装置模块的横截面侧视图；
图6A和图6B是根据本发明的再一实施例的用以形成双侧冷却集成功率装置模块的对图4C中所示的模块的修改的横截面侧视图；
图7A、7B和7C是根据本发明的又一实施例的具有用于驱动两个功率装置的控制IC的双侧冷却集成功率装置模块的相应俯视平面图、部分横截面俯视图和仰视平面图；
图8A是金属板的俯视图，其展示供在本发明的实施例中的一者中使用的将要从金属框架冲压的四个线夹的轮廓；
图8B是所述线夹中的两者在其已从图8A中所示的金属板冲压出且形成为图3B中所使用的线夹之后的侧视图；
图9A是多个部分包封的模块的块料模具的俯视平面图；
图9B是图9A中所示的一种类型的经包封模块在其已被单一化之后的仰视图；
图10是根据本发明的另一实施例的功率半导体封装的等距部分截面图；
图11是不具有包封材料的图10中所示的功率半导体封装的分解图；
图12是在图10中所示的封装的单一化之前具有图10中所示的半导体封装的片段的俯视图，其以轮廓线展示包封且包含引线框架；
图13和图14是图10中所示的半导体封装300的相应等距俯视图和仰视图；
图15是沿着图13中所示的线15-15取得的第一图解横截面图；
图16是沿着图13中的线16-16取得的第二图解横截面图；
图17是图10中所示的功率半导体封装的等距俯视图，其中以轮廓线展示包封材料；
图18是图10中所示的功率半导体封装的等距仰视图，其中以轮廓线展示包封材料；以及
图19A、19B、19C、19D、19E、19F、19G、19H、191、19J、19K和19L是在组装封装300中的各个阶段处的图10中所示的功率半导体封装的等距视图。
将了解，出于清楚的目的且在认为适当的情况下，已在图中重复参考标号以指示对应的特征。而且，图式中的各种物体的相对大小在某些情况下已失真以更清楚地展示本发明。
具体实施方式
本发明的实施例针对于半导体裸片封装及用于制造半导体裸片封装的方法。根据本发明的实施例的半导体裸片封装包含衬底和安装在所述衬底上的半导体裸片。可使用粘合剂或任何其它合适的附接材料将半导体裸片附接到衬底。在半导体裸片封装中，半导体裸片的底部表面和/或顶部表面可电耦合到衬底的导电区。包封材料可包封半导体裸片。如下文将进一步详细地阐释，根据本发明的实施例的衬底可在不同实施例中具有不同配置。
衬底可具有任何合适的配置。然而，在本发明的优选实施例中，所述衬底包含引线框架结构和模制材料。通常，所述引线框架结构的至少一个表面大体上与模制材料的外表面共面。在一些实施例中，在衬底中引线框架结构的两个相对主表面大体上与模制材料的相对外表面共面。
术语“引线框架结构”可指代从引线框架得到的结构。可例如通过此项技术中已知的压制工艺来形成引线框架结构。还可通过蚀刻连续的导电片以形成预定图案来形成示范性引线框架结构。因此，在本发明的实施例中，半导体裸片封装中的引线框架结构可为连续的金属结构或不连续的金属结构。
根据本发明的实施例的引线框架结构可最初为通过系杆连接在一起的引线框架结构阵列中的许多引线框架结构中的一者。在制造半导体裸片封装的过程期间，可切割引线框架结构阵列以将个别引线框架结构彼此分离。由于此切割，最终的半导体裸片封装中的引线框架结构的部分(例如，源极引线和栅极引线)可在电学上和在机械上彼此去耦。在其它实施例中，在制造根据本发明的实施例的半导体裸片封装时不使用引线框架结构阵列。
根据本发明的实施例的引线框架结构可包括任何合适材料，可具有任何合适形式且可具有任何合适厚度。示范性引线框架结构材料包含例如铜、铝、金等金属及其合金。引线框架结构还可包含电镀层，例如金、铬、银、钯、镍等的电镀层。
根据本发明的实施例的引线框架结构还可具有任何合适配置。举例来说，引线框架结构还可具有任何合适厚度，包含小于约1mm的厚度(例如，小于约0.5mm)。另外，引线框架结构可具有裸片附接区，其可形成裸片附接垫(DAP)。引线可横向延伸远离裸片附接区。其还可具有与形成裸片附接区的表面共面的表面。
在衬底中所使用的模制材料可包括任何合适材料。合适的模制材料包含基于联苯的材料和多官能交联环氧树脂复合材料。合适的模制材料以液态或半固态形式沉积于引线框架结构上，且此后被固化以使其硬化。
安装在衬底上的半导体裸片可包含任何合适的半导体装置。合适的装置可包含垂直装置。垂直装置至少具有在裸片的一侧处的输入和在裸片的另一侧处的输出，使得电流可垂直流动通过裸片。在2004年12月29日申请的第11/026,276号美国专利申请案中也描述了示范性半导体装置，所述申请案的全文以引用的方式并入本文中以用于所有目的。
垂直功率晶体管包含VDMOS晶体管和垂直双极晶体管。VDMOS晶体管是具有通过扩散形成的两个或两个以上半导体区的MOSFET。其具有源极区、漏极区和栅极。所述装置是垂直的，因为源极区和漏极区处于半导体裸片的相对表面处。栅极可为沟槽栅极结构或平面栅极结构，且形成在与源极区相同的表面处。沟槽栅极结构是优选的，因为与平面栅极结构相比，沟槽栅极结构较窄且占用较少空间。在操作期间，VDMOS装置中从源极区到漏极区的电流流动大体上垂直于裸片表面。
包封材料可用于包封半导体裸片。包封材料可包括与先前所描述的模制材料相同或不同类型的材料。在一些实施例中，包封材料覆盖或至少部分覆盖衬底以及位于衬底上的一个或一个以上半导体裸片。包封材料可用于保护所述一个或一个以上半导体裸片免于由于暴露于周围环境而受到潜在破坏。
可使用任何合适的工艺来包封半导体裸片和/或支撑半导体裸片的衬底。举例来说，可将半导体裸片和衬底放置于模制模具中，且可在半导体裸片和/或衬底的至少部分周围形成包封材料。特定的模制条件是所属领域的技术人员已知的。
图2A是根据本发明的一个实施例的用于形成双侧冷却集成功率装置模块的类型的两个引线框架结构32和34的平面图30。引线框架结构32、34具有连接杆36，所述连接杆36展示于图2A到2C中且在包封操作之后的单一化过程中被移除，未展示于其它图中以避免使图混乱。连接杆允许引线框架结构32、34成群放置并以一个卷制造。如图2B中所示，将焊膏38施加于将被焊接到两个线夹40和42的引线框架结构32、34的引线，且将两个功率装置44和46翻转并分别放置到引线框架结构32和34上。功率装置44、46在芯片的制造期间被涂覆焊料。在图2C中，所述两个线夹40、42分别放置于引线框架结构32、34和功率装置44、46上，且模块经加热以将功率装置44、46接合到引线框架结构32、34，并使焊膏分别在引线框架结构32、34的适当引线上以及在功率装置44、46的背侧上回流。出于论述简明起见，功率装置44、46在下文中将被称作MOSFET 44、46，但本发明不限于MOSFET或仅MOSFET。举例来说，横跨FET12和14的源极和漏极的二极管将可能为功率装置44和46的部分。
如图2B中可见，引线48和50分别连接到MOSFET 44、46的相应栅极，且这些引线在单一化过程之后与相应引线框架结构32、34的其余部分电隔离。引线框架结构32、34的未连接到引线48或50的部分分别连接到MOSFET 44、46的源极。MOSFET 40、46的漏极分别焊接到线夹40、42。
线夹40、42具有平面部件52和多个向下延伸的引线54，所述引线54在回流焊接过程期间焊接到具有焊膏38的引线。因此，MOSFET 44的源极通过线夹40连接到MOSFET 46的漏极。
图3A、3B和3C是集成功率装置模块66的相应俯视平面图60、横截面侧视图60和仰视平面图64，所述模块66是用例如环氧树脂等包封材料68部分包封的图2C中所示的结构。图3B的横截面图是沿着图3A中的线3B-3B。平面部件52暴露在图3A中的模块66的顶部处。如图3C中所示，模块66的底部具有作为引线框架结构32、34的部分的一列引线焊盘72、74和76连同暴露的源极垫78和80。引线82、84和86与源极垫78一样连接到MOSFET 44的源极。引线88、90和92是MOSFET 44的漏极和MOSFET 46的源极的共同连接，且引线94、96、98和100通过线夹42连接到MOSFET46的发射极。
通过用模块66取代两个离散FET 12和14，模块66适合在图1的同步降压转换器10中使用，其中由MOSFET 44取代FET 12，且由MOSFET 46取代FET 14。通过使用模块66，其中线夹40提供低侧MOSFET 44的漏极到高侧MOSFET 46的源极的电连接，所述两个MOSFET 44、46在物理上更靠近在一起且大体上减少了寄生电阻18和电感20。另外，通过线夹40、42的固有散热特性而改进功率FET的冷却，所述线夹40、42的顶部表面56未被包封。通过双侧冷却而进一步改进冷却，因为所述两个装置的源极经由其附接到的引线框架结构而暴露。因为需要单一焊料回流而不是多次焊料回流，所以形成模块66的方法还产生改进的焊点可靠性。
图4A、4B和4C是根据本发明的另一实施例的双侧冷却集成功率装置模块102的仰视平面图和侧视横截面图。图4A的仰视平面图展示四列引线焊盘106、108、110和112连同源极垫114和116。当制造模块102时，列108和110中的引线如图4B和4C中所示连接在一起，但经设计以使得通过沿着图4B和4C中所示的将列108中的引线与列110中的引线分离的线118来切断模块102，可将模块102分割为两个单独的单一功率装置模块。分别沿着图4A中的线4B-4B和4C-4C而取得图4B和4C中的横截面图。在图4C中，引线焊盘120、122和124是用于MOSFET 36、38的栅极焊盘。如果沿着线118分割模块102，则引线焊盘122将变得隔离。
图5是根据本发明的又一实施例的带引线的双侧冷却集成功率装置模块140的横截面侧视图。模块140具有外部引线142，其与模块140的末端处的焊盘垫144成一体。焊盘垫144与在先前实施例中一样暴露于模块140的底部处，但通过向上步进到位于模块140的底部平面上方的退出模块140的末端的第一水平部分146而延伸到包封之外，且接着向下步进到第二水平部分148以与模块140的底部平面大致成一直线。此带引线的模块140因此可适应带引线的封装占地面积。通过在线150和152处切割模块140的末端部分，可移除外部引线142以形成无引线的模块。
图6A和图6B是根据本发明的又一实施例的用以形成双侧冷却集成功率装置模块164的对图4C中所示的模块的修改的相应横截面侧视图160和162，其中两个MOSFET36和38的漏极连接在一起以形成共同漏极。在图6A中，在引线框架结构168中形成锯开的切口166以隔离MOSFET 36和38。在图6B中，导电且导热的散热片170附接到线夹44、46的平面部件54以形成共同漏极连接。
图7A、7B和7C是根据本发明的再一实施例的双侧冷却集成功率装置模块180的相应俯视平面图、部分横截面俯视图和仰视平面图，所述模块180包含用于驱动两个MOSFET44、46的控制IC 182，所述两个MOSFET 44、46分别具有定制的线夹184和186以用于将MOSFET 44的漏极连接到MOSFET 46的源极且用于提供MOSFET 44、46的冷却。图7A是展示暴露在模块180的顶部中的线夹184、186的相应平面部件188和190的俯视平面图。如图7C中所示，模块180具有三列引线焊盘192、194和196，其中末端引线焊盘延伸越过包封材料198的末端。图7B是模块180的部分横截面的俯视平面图。控制IC 182具有到列192中的某些引线焊盘以及到MOSFET 46的栅极和源极的多个线接合200。线夹184、186的形状和模块180的占地面积不同于任何先前所描述的模块，从而说明本发明的灵活性。
图8A是金属板200的俯视图，其展示供在本发明的实施例中的一者中使用的将要使用众所周知的操作从金属框架冲压的四个线夹202的轮廓。因此，线夹202可成群放置并以一个卷制造。图8B是所述线夹202中的两者在其已从图8A中所示的金属板冲压出且形成为图3B中所使用的线夹之后的侧视图。如图8B中所示，线夹202具有形成于其中的凹槽204以改进焊料附接。
图9A是多个部分包封的模块212的块料模具210的俯视平面图。在模制图5中所示的表壳带引线的模块140的过程中，模块140将形成为经单一化的模具。图9B是图3A到3C中所示的类型的经包封模块66在其已从块料模具210单一化之后的仰视图。将了解，可在块料模具210中形成任何无引线的模块。
图10是根据本发明的另一实施例的功率半导体封装300的等距部分截面图。封装300具有具三个单独区段的引线框架结构，所述三个单独区段为控制区段或栅极区段302、第一电流携载区段或源极区段304和第二电流携载区段或漏极区段306。栅极区段302包含外部引线308，其延伸越过包封材料310且是栅极区段302的较厚部分312的部分。垂直表面314勾勒出栅极区段302的较厚部分312与较薄部分316之间的边界。
源极区段304具有三个外部引线318，其延伸越过包封材料310且是源极区段304的三个较厚部分320的部分。垂直表面322勾勒出源极区段304的较厚部分320与较薄部分324之间的边界。较薄部分324是源极区段304的主体的部分，所述源极区段304大体上位于半导体装置326下方且附接到半导体装置326。另一较厚部分328在源极区段304的主体的一部分下方延伸。源极区段304具有两个系杆330和332(图11中所示)，其用于在组装半导体封装300时将源极区段固持在适当位置。
漏极区段306具有四个外部引线334，其延伸越过包封材料310且是漏极区段306的四个较厚部分336的部分。垂直表面338勾勒出漏极区段306的较厚部分336与较薄部分340之间的边界。
半导体装置326附接到栅极区段302以及源极区段304。半导体装置可为倒装芯片功率MOSFET，其栅极通过焊料凸块342和焊料344附接到栅极区段302，且其源极通过焊料凸块346和焊料344附接到源极区段304，图10中未展示其全部。
附接到半导体装置300的顶部的是支柱或线夹350，其可为漏极线夹350，所述漏极线夹350具有顶部表面352和三个弯曲部分354，所述弯曲部分354中的每一者具有分叉末端356。所述分叉末端356通过焊料344附接到发射极区段306。所述分叉末端356中的每一者端接于经形状设计为类似于半导体装置326上的焊料凸块342、346的形状的圆化部分360(图11和图15中所示)中。漏极线夹350被一半蚀刻以沿着所述线夹的三个顶部边缘上的中间部分形成切口区362。切口区362与包封材料310一起有助于将漏极线夹350紧固在适当位置。包封材料310从封装300的顶部延伸到底部，同时使漏极线夹350的顶部表面352和栅极区段302的较厚部分312、源极区段304的较厚部分320和328以及漏极区段306的较厚部分336暴露。
图11是不具有包封材料310的图10中所示的功率半导体封装300的分解图，其提供封装300的剩余组件的较全面视图。
图12是在封装300的单一化之前半导体封装300的俯视图370，其中以轮廓线展示包封材料310，其中引线框架结构区段302、304和306连接到引线框架的部分372。如图12中所示，发射极区段306的较厚部分336与较薄部分340之间的垂直边缘338在图12中横向延伸以及平行于外部引线334的末端。切割线374指示当封装300被单一化时外部引线308、318和334的末端的位置。
图13和图14是图10中所示的半导体封装300的相应等距俯视图和仰视图。如图14中所示，引线框架结构的栅极区段302、源极区段304和发射极区段306的较厚部分暴露于封装300的底部上，而所述三个区段302、304、306的较薄部分被封闭在包封材料310内。源极区段304的较厚部分328的暴露表面380连接到漏极引线318，且可替代用于电连接到MOSFET326的源极的漏极引线318或除所述漏极引线318之外加以使用。暴露表面380还可焊接到印刷电路板(PCB)上的金属岛以提供离开半导体裸片326的额外热量传导。
图15是沿着图13中所示的线15-15取得的第一图解横截面图。
图16是沿着图13中的线16-16取得的第二图解横截面图。
图17是图10中所示的半导体封装300的等距俯视图，其中以轮廓线展示包封材料310：
图18是图10中所示的半导体封装300的等距仰视图，其中以轮廓线展示包封材料310；以及
图19A、19B、19C、19D、19E、19F、19G、19H、191、19J、19K和19L是在组装封装300中的各个阶段处的图10中所示的半导体封装300的等距视图。图19A展示线夹350的底部。将理解，虽然仅展示单一线夹350，但所述线夹350在组装过程的此部分期间附接到其它线夹350。通过将软焊料放置到线夹350上、将半导体裸片326放置于软焊料上的适当位置且使焊料回流以形成半导体裸片326与线夹350之间的焊料接合400，而将半导体裸片326的背侧焊接到线夹350。
将接下来的铜凸块或晶片级球滴放置于半导体裸片的顶侧上以形成如图19C中所示的焊料凸块342和246。在图19D中，线夹510被与附接到其的其它线夹分离或单一化。
图19E展示在已将焊膏402放置于图12中所示的引线框架的部分372上之后的所述部分372。将图19D中所示的组合件放置于所述部分372上，且通过使焊膏回流而焊接到所述部分372，以形成图19F中所示的组合件。使焊膏回流所需的热量比使安放在图19B中的线夹350上的软焊料软化所需的热量少，且因此不干扰线夹350与半导体裸片326之间的接合。
接下来，如图19G中所示，使用薄膜辅助模制将包封材料510模制到图19中所示的组合件上。接着使所述组合件经受晶片喷射修边(图19H)和激光标记(图19I)。
接着将封装300从引线框架单一化以形成图19J中所示的组合件。接着对所述组合件进行测试(图19K)且包装和运送(图19L)。
已特定参考本发明的某些优选实施例而详细描述了本发明，但将理解，在本发明的精神和范围内可实现变化和修改。

Claims (4)

1.一种部分包封的半导体封装，其具有：部分暴露的顶部热线夹，其具有垂直于所述顶部热线夹的所述暴露顶部部分的多个折叠弯曲部分；以及引线框架结构，其具有三个单独区段：控制区段、第一高电流区段和第二高电流区段，其中所述多个折叠弯曲部分与所述第二高电流区段相接触，且所述三个单独区段具有暴露的底部表面，其中所述引线框架结构的所述区段的所有底部表面均完全共面。
2.根据权利要求1所述的封装，其中所述顶部热线夹具有位于一个或多个顶部侧边缘上的一个或多个切口，所述一个或多个切口中填充有包封材料，且其中所述顶部热线夹具有被一半蚀刻的边缘以将包封材料固持于所述夹及所述区段。
3.根据权利要求1所述的封装，其进一步包含半导体装置，所述半导体装置附接到所述顶部热线夹并附接到所述引线框架结构。
4.一种制造部分包封的半导体封装的方法，其包括以下步骤：
提供共面引线框架，其具有三个单独区段：控制区段、第一高电流区段和第二高电流区段；
将半导体装置附接到所述控制区段和所述第一高电流区段；
将线夹附接到所述半导体装置的与所述引线框架相对的侧，其中所述线夹具有多个弯曲部分，所述多个弯曲部分附接到所述第二高电流区段；以及
用模制材料部分包封所述引线框架、所述半导体装置和所述线夹以形成所述封装，
其中所述引线框架的所述区段的所有底部表面均完全共面。
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