JP6492980B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP6492980B2
JP6492980B2 JP2015111772A JP2015111772A JP6492980B2 JP 6492980 B2 JP6492980 B2 JP 6492980B2 JP 2015111772 A JP2015111772 A JP 2015111772A JP 2015111772 A JP2015111772 A JP 2015111772A JP 6492980 B2 JP6492980 B2 JP 6492980B2
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JP
Japan
Prior art keywords
semiconductor wafer
groove
semiconductor
semiconductor device
front surface
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Expired - Fee Related
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JP2015111772A
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English (en)
Japanese (ja)
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JP2016225511A (ja
Inventor
皆澤 宏
宏 皆澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP2015111772A priority Critical patent/JP6492980B2/ja
Priority to CN201610304722.5A priority patent/CN106206251A/zh
Publication of JP2016225511A publication Critical patent/JP2016225511A/ja
Application granted granted Critical
Publication of JP6492980B2 publication Critical patent/JP6492980B2/ja
Expired - Fee Related legal-status Critical Current
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043Making grooves, e.g. cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
JP2015111772A 2015-06-01 2015-06-01 半導体装置の製造方法 Expired - Fee Related JP6492980B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2015111772A JP6492980B2 (ja) 2015-06-01 2015-06-01 半導体装置の製造方法
CN201610304722.5A CN106206251A (zh) 2015-06-01 2016-05-10 半导体装置及半导体装置的制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015111772A JP6492980B2 (ja) 2015-06-01 2015-06-01 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2016225511A JP2016225511A (ja) 2016-12-28
JP6492980B2 true JP6492980B2 (ja) 2019-04-03

Family

ID=57453393

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015111772A Expired - Fee Related JP6492980B2 (ja) 2015-06-01 2015-06-01 半導体装置の製造方法

Country Status (2)

Country Link
JP (1) JP6492980B2 (zh)
CN (1) CN106206251A (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102017102127B4 (de) * 2017-02-03 2023-03-09 Infineon Technologies Ag Verfahren zum Herstellen von Halbleitervorrichtungen unter Verwendung einer Epitaxie und Halbleitervorrichtungen mit einer lateralen Struktur
JP7313968B2 (ja) * 2019-08-15 2023-07-25 株式会社ディスコ ウエーハの加工方法
CN115831736B (zh) * 2023-02-13 2023-05-05 成都万应微电子有限公司 一种半导体材料产品的切割方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003332270A (ja) * 2002-05-15 2003-11-21 Renesas Technology Corp 半導体装置およびその製造方法
JP2005353856A (ja) * 2004-06-11 2005-12-22 Fuji Electric Device Technology Co Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
CN106206251A (zh) 2016-12-07
JP2016225511A (ja) 2016-12-28

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