JP6332474B2 - セラミック基板、電子部品およびセラミック基板の製造方法 - Google Patents
セラミック基板、電子部品およびセラミック基板の製造方法 Download PDFInfo
- Publication number
- JP6332474B2 JP6332474B2 JP2016568719A JP2016568719A JP6332474B2 JP 6332474 B2 JP6332474 B2 JP 6332474B2 JP 2016568719 A JP2016568719 A JP 2016568719A JP 2016568719 A JP2016568719 A JP 2016568719A JP 6332474 B2 JP6332474 B2 JP 6332474B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- insulating layer
- ceramic insulating
- layer
- ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000919 ceramic Substances 0.000 title claims description 101
- 239000000758 substrate Substances 0.000 title claims description 29
- 238000000034 method Methods 0.000 title description 8
- 238000004519 manufacturing process Methods 0.000 title description 5
- 239000011521 glass Substances 0.000 claims description 18
- 229910000679 solder Inorganic materials 0.000 claims description 11
- 239000010410 layer Substances 0.000 description 139
- 238000010304 firing Methods 0.000 description 11
- 239000004020 conductor Substances 0.000 description 8
- 239000002184 metal Substances 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 238000007747 plating Methods 0.000 description 7
- 238000007789 sealing Methods 0.000 description 6
- 238000005245 sintering Methods 0.000 description 5
- 238000005219 brazing Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 230000007847 structural defect Effects 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000009432 framing Methods 0.000 description 2
- 229910000833 kovar Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 238000010344 co-firing Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000011812 mixed powder Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
- H03H9/1007—Mounting in enclosures for bulk acoustic wave [BAW] devices
- H03H9/1014—Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the BAW device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
- H03H9/1057—Mounting in enclosures for microelectro-mechanical devices
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1283—After-treatment of the printed patterns, e.g. sintering or curing methods
- H05K3/1291—Firing or sintering at relative high temperatures for patterns on inorganic boards, e.g. co-firing of circuits on green ceramic sheets
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10075—Non-printed oscillator
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Acoustics & Sound (AREA)
- Inorganic Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
本発明にかかる電子部品の第1実施形態について、図1〜図3を参照して説明する。なお、図2でははんだHが図示省略されている。
セラミック基板2の製造法の一例について説明する。
電極22,23の剥離強度について図3を参照して説明する。なお、図3では縦軸が電極の剥離強度を示し、同図中の左側のプロットが密着層が無い場合の剥離強度、同図中の右側のプロットが密着層がある場合の剥離強度を示している。
本発明にかかる電子部品の第2実施形態について、図5を参照して説明する。なお、以下の説明では、上記した第1実施形態と異なる点を中心に説明を行い、上記した第1実施形態と同様の構成については同一符号を引用することによりその構成の説明を省略する。
2,12 セラミック基板
21 セラミック絶縁層
21a 一主面
22,23 電極
25a,25b 密着層
3,13 蓋部材
4 デバイス
H はんだ
R 所定領域
Claims (2)
- セラミック絶縁層と、前記セラミック絶縁層の一主面上に形成された電極とを備えるセラミック基板を備える電子部品において、
蓋部材と、
振動する部位を有するデバイスと、
前記電極と前記セラミック絶縁層との間に、ガラスペーストを焼成して成る密着層とを備え、
前記セラミック絶縁層の一主面上の所定領域を囲むように環状に形成された前記密着層上に前記電極が環状に形成され、
前記蓋部材が前記所定領域を覆うように前記電極上に配置されてはんだにより前記電極に接合され、
前記蓋部材と前記セラミック絶縁層の一主面との間に前記電極により囲まれて形成された空間に前記デバイスが配置されている
ことを特徴とする電子部品。 - 前記電極の平面視における面積が前記密着層よりも小さく、前記電極が平面視で前記密着層の内側に配置されていることを特徴とする請求項1に記載の電子部品。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015001647 | 2015-01-07 | ||
JP2015001647 | 2015-01-07 | ||
PCT/JP2016/050098 WO2016111281A1 (ja) | 2015-01-07 | 2016-01-05 | セラミック基板、電子部品およびセラミック基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2016111281A1 JPWO2016111281A1 (ja) | 2017-10-12 |
JP6332474B2 true JP6332474B2 (ja) | 2018-05-30 |
Family
ID=56355969
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016568719A Active JP6332474B2 (ja) | 2015-01-07 | 2016-01-05 | セラミック基板、電子部品およびセラミック基板の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10405430B2 (ja) |
JP (1) | JP6332474B2 (ja) |
CN (1) | CN107113985A (ja) |
WO (1) | WO2016111281A1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108966491B (zh) * | 2017-12-29 | 2019-07-16 | 深圳硅基仿生科技有限公司 | 气密馈通的陶瓷基板及其制造方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06237081A (ja) * | 1993-02-10 | 1994-08-23 | Matsushita Electric Ind Co Ltd | 多層セラミック基板の製造方法 |
JPH07221218A (ja) * | 1994-02-03 | 1995-08-18 | Toshiba Corp | 半導体装置 |
JPH09221375A (ja) * | 1996-02-14 | 1997-08-26 | Sumitomo Metal Ind Ltd | セラミックス基板及びその製造方法 |
JP3736961B2 (ja) * | 1998-01-27 | 2006-01-18 | 株式会社住友金属エレクトロデバイス | セラミックス基板 |
US6237081B1 (en) * | 1998-12-16 | 2001-05-22 | International Business Machines Corporation | Queuing method and apparatus for facilitating the rejection of sequential instructions in a processor |
JP2001196485A (ja) * | 2000-01-12 | 2001-07-19 | Daishinku Corp | 電子部品用パッケージおよび圧電振動デバイス |
JP2001308214A (ja) * | 2000-04-26 | 2001-11-02 | Seiko Epson Corp | セラミックパッケージの封止方法と封止構造 |
JP2002334943A (ja) * | 2001-05-09 | 2002-11-22 | Murata Mfg Co Ltd | 電子部品 |
JP2003048785A (ja) * | 2001-08-06 | 2003-02-21 | Kyocera Corp | 金属部材とセラミック部材との接合構造および金属部材とセラミック部材との接合方法 |
JP4339139B2 (ja) * | 2004-01-26 | 2009-10-07 | 京セラ株式会社 | セラミック配線基板 |
US7250576B2 (en) * | 2005-05-19 | 2007-07-31 | International Business Machines Corporation | Chip package having chip extension and method |
JP2009194091A (ja) | 2008-02-13 | 2009-08-27 | Seiko Instruments Inc | 電子部品、電子機器、及びベース部材製造方法 |
CN103718288B (zh) * | 2012-03-14 | 2016-08-17 | 日本特殊陶业株式会社 | 陶瓷基板及其制造方法 |
JP6070702B2 (ja) * | 2012-06-04 | 2017-02-01 | 日立金属株式会社 | シールリングおよびシールリングの製造方法 |
US9041192B2 (en) * | 2012-08-29 | 2015-05-26 | Broadcom Corporation | Hybrid thermal interface material for IC packages with integrated heat spreader |
JP6150249B2 (ja) * | 2013-02-25 | 2017-06-21 | 京セラ株式会社 | 電子デバイスのガラス封止方法 |
US9673119B2 (en) * | 2014-01-24 | 2017-06-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | System and method for bonding package lid |
CN105590869A (zh) * | 2014-10-24 | 2016-05-18 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制作方法 |
-
2016
- 2016-01-05 CN CN201680004687.3A patent/CN107113985A/zh active Pending
- 2016-01-05 WO PCT/JP2016/050098 patent/WO2016111281A1/ja active Application Filing
- 2016-01-05 JP JP2016568719A patent/JP6332474B2/ja active Active
-
2017
- 2017-06-28 US US15/635,786 patent/US10405430B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20170303398A1 (en) | 2017-10-19 |
CN107113985A (zh) | 2017-08-29 |
JPWO2016111281A1 (ja) | 2017-10-12 |
WO2016111281A1 (ja) | 2016-07-14 |
US10405430B2 (en) | 2019-09-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6671441B2 (ja) | 電子部品収納用パッケージ、多数個取り配線基板、電子装置および電子モジュール | |
TWI604572B (zh) | 陶瓷封裝體、電子零件裝置及其製造方法 | |
WO2016084841A1 (ja) | 電子部品収納用パッケージ、多数個取り配線基板および電子部品収納用パッケージの製造方法 | |
JP2010073907A (ja) | 電子部品用パッケージ、電子部品用パッケージのベース | |
JP2007043340A (ja) | 表面実装型圧電デバイス及びその製造方法 | |
WO2018216693A1 (ja) | 多数個取り配線基板、電子部品収納用パッケージ、および電子装置 | |
JP6332474B2 (ja) | セラミック基板、電子部品およびセラミック基板の製造方法 | |
JP2007048798A (ja) | 電子部品収納用セラミックパッケージ | |
JP4439291B2 (ja) | 圧電振動子収納用パッケージおよび圧電装置 | |
JP6129491B2 (ja) | 多数個取り配線基板 | |
JP6677547B2 (ja) | 電子部品収納用パッケージ、電子装置および電子モジュール | |
JP6993220B2 (ja) | 電子部品収納用パッケージ、電子装置および電子モジュール | |
JP2015029201A (ja) | 圧電振動素子搭載用基板および圧電装置 | |
JP6321477B2 (ja) | 電子部品収納用パッケージ、パッケージ集合体および電子部品収納用パッケージの製造方法 | |
JP5831311B2 (ja) | 圧電振動デバイスおよび圧電振動デバイスの製造方法 | |
JP2011097247A (ja) | 高周波モジュールおよびその製造方法 | |
JP2010192760A (ja) | セラミックパッケージ基板 | |
JP2017228730A (ja) | 配線基板、電子装置および電子モジュール | |
JP2010182709A (ja) | 電子部品パッケージ、電子部品パッケージの製造方法、及び圧電デバイス | |
JP2005244146A (ja) | 電子部品収納用パッケージおよび電子装置ならびに電子装置の実装構造 | |
JP2017011025A (ja) | 電子部品収納用パッケージ、電子装置および電子モジュール | |
JP2005079424A (ja) | 電子部品用パッケージ | |
JP5882868B2 (ja) | 圧電装置ならびに圧電装置の製造方法 | |
JP2017022334A (ja) | 多数個取り配線基板及びその製造方法 | |
JP2016111246A (ja) | 電子部品収納用パッケージ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170627 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20170627 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20171107 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180109 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20180403 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20180416 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6332474 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |