JP6289738B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 89
- 238000004519 manufacturing process Methods 0.000 title claims description 36
- 238000000034 method Methods 0.000 claims description 56
- 239000012535 impurity Substances 0.000 claims description 27
- 238000005530 etching Methods 0.000 claims description 25
- 238000001039 wet etching Methods 0.000 claims description 23
- 238000001312 dry etching Methods 0.000 claims description 21
- 238000009792 diffusion process Methods 0.000 claims description 20
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 8
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical group [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 229910002601 GaN Inorganic materials 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 230000008569 process Effects 0.000 description 29
- 239000010410 layer Substances 0.000 description 28
- 238000010586 diagram Methods 0.000 description 24
- 229920002120 photoresistant polymer Polymers 0.000 description 20
- 239000000758 substrate Substances 0.000 description 19
- 239000002344 surface layer Substances 0.000 description 7
- 230000004913 activation Effects 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 238000000137 annealing Methods 0.000 description 6
- 238000000059 patterning Methods 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 238000005299 abrasion Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000003213 activating effect Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 238000007790 scraping Methods 0.000 description 3
- 229910017855 NH 4 F Inorganic materials 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
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- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
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Description
実施の形態1に係る半導体装置の製造方法を説明する。図1〜図11はその製造方法を示す工程図であり、各工程での半導体装置の断面を示している。本実施の形態では、パワー半導体装置としてnチャネル型のMOSFETを例示する。
実施の形態2に係る半導体装置の製造方法を説明する。図12〜図22はその製造方法を示す工程図であり、各工程での半導体装置の断面を示している。本実施の形態では、パワー半導体装置としてpn接合ダイオードを例示する。
Claims (5)
- 半導体層に不純物拡散領域を形成する工程と、
前記半導体層上に厚さ0.5μm以上の絶縁膜を形成する工程と、
前記絶縁膜上にエッチングマスクを形成する工程と、
前記エッチングマスクをマスクとして用いたエッチングにより、前記絶縁膜に半導体層の上面に達する平面視で2mm×2mm以上の寸法の開口を形成して、前記不純物拡散領域の少なくとも一部を前記絶縁膜から露出させる工程と、を備え、
前記開口を形成する工程は、
前記エッチングマスクをマスクとして用いるドライエッチングにより、前記絶縁膜の半分以下の厚さが残るように前記絶縁膜を除去する工程と、
前記エッチングマスクをマスクとして用いるウェットエッチングにより、前記半導体層の上面に達するまで前記絶縁膜を除去する工程と、を含み、
前記絶縁膜は、シリコン酸化膜から成る第1絶縁膜と、前記第1絶縁膜上に形成され前記第1絶縁膜よりも厚いシリコン窒化膜から成る第2絶縁膜とを含んでおり、
前記開口を形成する工程は、前記ドライエッチングを行う工程で前記第2絶縁膜を除去し、前記ウェットエッチングを行う工程で前記第1絶縁膜を除去することによって行われる
ことを特徴とする半導体装置の製造方法。 - 前記第2絶縁膜は、前記第1絶縁膜よりも前記ドライエッチングでの前記エッチングマスクに対する選択比が大きく、
前記第1絶縁膜は、前記第2絶縁膜よりも前記ウェットエッチングでのエッチング速度が小さい
請求項1に記載の半導体装置の製造方法。 - 前記開口を形成する工程で前記絶縁膜から露出される前記不純物拡散領域は、トランジスタのチャネル領域を含む
請求項1に記載の半導体装置の製造方法。 - 前記半導体層は、シリコンよりも格子定数の小さい材料で形成されている
請求項1に記載の半導体装置の製造方法。 - 前記半導体層の材料は、炭化珪素または窒化ガリウムである
請求項4に記載の半導体装置の製造方法。
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PCT/JP2015/059299 WO2016151829A1 (ja) | 2015-03-26 | 2015-03-26 | 半導体装置の製造方法 |
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US (1) | US10242876B2 (ja) |
JP (1) | JP6289738B2 (ja) |
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JP6887244B2 (ja) * | 2016-12-09 | 2021-06-16 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
CN107492484A (zh) * | 2017-08-15 | 2017-12-19 | 上海华虹宏力半导体制造有限公司 | Sab层图形结构的制造方法 |
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JPS59104143A (ja) * | 1982-12-07 | 1984-06-15 | Sony Corp | 配線の形成方法 |
JPS61259528A (ja) * | 1985-05-13 | 1986-11-17 | Matsushita Electronics Corp | 半導体装置の製造方法 |
JPS62118529A (ja) * | 1985-11-19 | 1987-05-29 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JPS6319823A (ja) * | 1986-07-14 | 1988-01-27 | Hitachi Ltd | 微細薄膜パタ−ンの形成方法 |
US4676869A (en) * | 1986-09-04 | 1987-06-30 | American Telephone And Telegraph Company At&T Bell Laboratories | Integrated circuits having stepped dielectric regions |
JPH0922998A (ja) | 1995-07-04 | 1997-01-21 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JP4671314B2 (ja) | 2000-09-18 | 2011-04-13 | 独立行政法人産業技術総合研究所 | オーミック電極構造体の製造方法、接合型fet又は接合型sitのオーミック電極構造体の製造方法、及び半導体装置の製造方法 |
JP2005236062A (ja) * | 2004-02-20 | 2005-09-02 | Nec Electronics Corp | 不揮発性半導体記憶装置の製造方法 |
JP2008294171A (ja) | 2007-05-24 | 2008-12-04 | Oki Electric Ind Co Ltd | 半導体デバイス及びその製造方法 |
JP2013030618A (ja) * | 2011-07-28 | 2013-02-07 | Rohm Co Ltd | 半導体装置 |
CN104157564B (zh) * | 2013-05-15 | 2016-12-28 | 中芯国际集成电路制造(上海)有限公司 | 改善刻蚀后关键尺寸均匀性的方法 |
CN104241114B (zh) * | 2013-06-09 | 2017-11-10 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
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CN104078335B (zh) * | 2014-06-30 | 2017-04-19 | 中国科学院上海微系统与信息技术研究所 | 一种用于HVPE生长GaN单晶的复合籽晶模板及方法 |
JP6319823B2 (ja) * | 2014-08-25 | 2018-05-09 | エヌエスディ株式会社 | センサ装置及びセンサシステム用の機器 |
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- 2015-03-26 WO PCT/JP2015/059299 patent/WO2016151829A1/ja active Application Filing
- 2015-03-26 JP JP2017507271A patent/JP6289738B2/ja active Active
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DE112015006371T5 (de) | 2017-12-14 |
CN107431009A (zh) | 2017-12-01 |
US20180019130A1 (en) | 2018-01-18 |
WO2016151829A1 (ja) | 2016-09-29 |
JPWO2016151829A1 (ja) | 2017-08-10 |
CN107431009B (zh) | 2020-10-27 |
US10242876B2 (en) | 2019-03-26 |
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