JP6216157B2 - 電子部品装置及びその製造方法 - Google Patents
電子部品装置及びその製造方法 Download PDFInfo
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- JP6216157B2 JP6216157B2 JP2013110634A JP2013110634A JP6216157B2 JP 6216157 B2 JP6216157 B2 JP 6216157B2 JP 2013110634 A JP2013110634 A JP 2013110634A JP 2013110634 A JP2013110634 A JP 2013110634A JP 6216157 B2 JP6216157 B2 JP 6216157B2
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- electronic component
- hole
- connection pad
- insulating layer
- connection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013110634A JP6216157B2 (ja) | 2013-05-27 | 2013-05-27 | 電子部品装置及びその製造方法 |
| US14/260,588 US9373587B2 (en) | 2013-05-27 | 2014-04-24 | Stacked electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013110634A JP6216157B2 (ja) | 2013-05-27 | 2013-05-27 | 電子部品装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014229855A JP2014229855A (ja) | 2014-12-08 |
| JP2014229855A5 JP2014229855A5 (enExample) | 2016-01-28 |
| JP6216157B2 true JP6216157B2 (ja) | 2017-10-18 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013110634A Active JP6216157B2 (ja) | 2013-05-27 | 2013-05-27 | 電子部品装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9373587B2 (enExample) |
| JP (1) | JP6216157B2 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9999136B2 (en) * | 2014-12-15 | 2018-06-12 | Ge Embedded Electronics Oy | Method for fabrication of an electronic module and electronic module |
| JP7574747B2 (ja) * | 2021-06-04 | 2024-10-29 | 株式会社デンソー | 半導体装置およびその製造方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06268101A (ja) * | 1993-03-17 | 1994-09-22 | Hitachi Ltd | 半導体装置及びその製造方法、電子装置、リ−ドフレ−ム並びに実装基板 |
| JP2944449B2 (ja) | 1995-02-24 | 1999-09-06 | 日本電気株式会社 | 半導体パッケージとその製造方法 |
| US6180881B1 (en) * | 1998-05-05 | 2001-01-30 | Harlan Ruben Isaak | Chip stack and method of making same |
| US6404043B1 (en) * | 2000-06-21 | 2002-06-11 | Dense-Pac Microsystems, Inc. | Panel stacking of BGA devices to form three-dimensional modules |
| JP3653452B2 (ja) * | 2000-07-31 | 2005-05-25 | 株式会社ノース | 配線回路基板とその製造方法と半導体集積回路装置とその製造方法 |
| JP2002313996A (ja) * | 2001-04-18 | 2002-10-25 | Toshiba Chem Corp | 半導体パッケージ用基板およびその製造方法 |
| KR100510556B1 (ko) * | 2003-11-11 | 2005-08-26 | 삼성전자주식회사 | 초박형 반도체 패키지 및 그 제조방법 |
| JP4517124B2 (ja) * | 2005-01-21 | 2010-08-04 | 株式会社アドバンストシステムズジャパン | スタック型半導体装置 |
| JP4551255B2 (ja) * | 2005-03-31 | 2010-09-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP4704800B2 (ja) * | 2005-04-19 | 2011-06-22 | エルピーダメモリ株式会社 | 積層型半導体装置及びその製造方法 |
| US7242081B1 (en) * | 2006-04-24 | 2007-07-10 | Advanced Semiconductor Engineering Inc. | Stacked package structure |
| KR20100033012A (ko) * | 2008-09-19 | 2010-03-29 | 주식회사 하이닉스반도체 | 반도체 패키지 및 이를 갖는 적층 반도체 패키지 |
| US8304900B2 (en) * | 2010-08-11 | 2012-11-06 | Stats Chippac Ltd. | Integrated circuit packaging system with stacked lead and method of manufacture thereof |
| JPWO2012035972A1 (ja) * | 2010-09-17 | 2014-02-03 | 住友ベークライト株式会社 | 半導体パッケージおよび半導体装置 |
| KR101677739B1 (ko) * | 2010-09-29 | 2016-11-21 | 삼성전자주식회사 | 반도체 패키지 및 그의 제조방법 |
| US8525318B1 (en) * | 2010-11-10 | 2013-09-03 | Amkor Technology, Inc. | Semiconductor device and fabricating method thereof |
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| JP2014229855A (ja) | 2014-12-08 |
| US20140347833A1 (en) | 2014-11-27 |
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