JP6154458B2 - 電子部品収納用パッケージおよび電子装置 - Google Patents
電子部品収納用パッケージおよび電子装置 Download PDFInfo
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- JP6154458B2 JP6154458B2 JP2015501548A JP2015501548A JP6154458B2 JP 6154458 B2 JP6154458 B2 JP 6154458B2 JP 2015501548 A JP2015501548 A JP 2015501548A JP 2015501548 A JP2015501548 A JP 2015501548A JP 6154458 B2 JP6154458 B2 JP 6154458B2
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/26—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device including materials for absorbing or reacting with moisture or other undesired substances, e.g. getters
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
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- Inorganic Chemistry (AREA)
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Description
図1(a)は本発明の第1の実施形態の電子部品収納用パッケージおよび電子装置を示す平面図であり、図1(b)は図1(a)のA−A線における断面図である。凹部2を含む絶縁基体1と、絶縁基体1に設けられた配線導体5と、凹部2内に直接接合された金属部3とによって電子部品収納用パッケージが基本的に構成されている。なお、図1(a)においては見やすくするために後述する電子部品および蓋体を省略している。
凹部2の内表面を構成する絶縁基体1と金属部3とが拡散接合している場合、両者間で互いの成分(酸化アルミニウムおよび後述するチタン等の金属材料等)の相互拡散が生じていてもよい。この場合には、絶縁基体1と金属部3との間の接合の強度が向上して、絶縁基体1からの金属部3の剥がれがより効果的に抑制され得る。
2・・・・凹部
3(A、B)・・・金属部
4(A)・・・・・くぼみ部
5(A、B)・・・配線導体
6(A、B)・・・電子部品
7(A、B)・・・導電性接続材
8・・・・蓋体
9・・・(凹部の底面の)メタライズ層
Claims (12)
- セラミック焼結体からなり、凹部を含む絶縁基体と、該絶縁基体に設けられた配線導体とを含む基板部と、
前記凹部に直接接合された、ゲッター性金属材の粒子同士が焼結一体化した焼結体からなる金属部と、を備えており、
前記金属部は前記凹部の内表面と直接接合されており、
前記金属部と前記凹部の内表面との界面近傍において、前記金属部および前記凹部の前記内表面のうち少なくとも一方の成分が他方にあることを特徴とする電子部品収納用パッケージ。 - セラミック焼結体からなり、凹部を含む絶縁基体と、該絶縁基体に設けられた配線導体とを含む基板部と、
前記凹部の内表面に設けられたメタライズ層に直接接合された、ゲッター性金属材の粒子同士が焼結一体化した焼結体からなる金属部と、を備えており
前記金属部と前記凹部の内表面に設けられたメタライズ層との界面近傍において、前記金属部および前記メタライズ層のうち少なくとも一方の成分が他方にあることを特徴とする電子部品収納用パッケージ。 - 前記凹部の内表面にくぼみ部を有しており、
前記金属部が前記くぼみ部内に位置していることを特徴とする請求項1または請求項2に記載の電子部品収納用パッケージ。 - 前記金属部の全部が前記くぼみ部内に収まっていることを特徴とする請求項3に記載の電子部品収納用パッケージ。
- 前記金属部が前記くぼみ部内から前記内表面にわたって設けられていることを特徴とする請求項3に記載の電子部品収納用パッケージ。
- 前記凹部の内表面が、側面と底面とを含み、前記側面が段状部を有しており、
前記くぼみ部が前記段状部の前記凹部内に面した側面に設けられていることを特徴とする請求項3〜請求項5のいずれかに記載の電子部品収納用パッケージ。 - 前記配線導体が前記段状部の上面に設けられており、平面視において、前記段状部の前記上面が多角形の枠状であるとともに、前記くぼみ部が前記上面の角部に位置しているこ
とを特徴とする請求項6記載の電子部品収納用パッケージ。 - 前記凹部の内表面が、側面と底面とを含み、前記金属部が前記凹部の底面に設けられていることを特徴とする請求項1〜請求項7のいずれかに記載の電子部品収納用パッケージ。
- 前記くぼみ部が、前記凹部の底面のうち前記凹部内に収容される電子部品の下側になる部位に位置しており、
前記金属部が、前記くぼみ部内から前記凹部の底面にわたって設けられた下段と、該下段上に設けられた上段との2層構造であることを特徴とする請求項3を引用する請求項8記載の電子部品収納用パッケージ。 - 前記凹部の前記底面が電子部品の搭載部を含んでおり、
前記金属部が、前記凹部の前記底面に前記搭載部を囲んで設けられていることを特徴とする請求項8記載の電子部品収納用パッケージ。 - 前記金属部が空隙を有する多孔質であり、前記空隙に面した前記金属部が前記ゲッター性金属材からなることを特徴とする請求項1〜請求項10のいずれかに記載の電子部品収納用パッケージ。
- 請求項1〜請求項11のいずれかに記載の電子部品収納用パッケージと、
前記凹部内に収容された電子部品と、を備えることを特徴とする電子装置。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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JP2013034689 | 2013-02-25 | ||
JP2013034689 | 2013-02-25 | ||
PCT/JP2014/054590 WO2014129666A1 (ja) | 2013-02-25 | 2014-02-25 | 電子部品収納用パッケージおよび電子装置 |
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JPWO2014129666A1 JPWO2014129666A1 (ja) | 2017-02-02 |
JP6154458B2 true JP6154458B2 (ja) | 2017-06-28 |
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US (1) | US9756731B2 (ja) |
EP (1) | EP2960935B1 (ja) |
JP (1) | JP6154458B2 (ja) |
WO (1) | WO2014129666A1 (ja) |
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US10474027B2 (en) * | 2017-11-13 | 2019-11-12 | Macronix International Co., Ltd. | Method for forming an aligned mask |
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US20230077877A1 (en) * | 2021-09-10 | 2023-03-16 | Advanced Semiconductor Engineering, Inc. | Photonic package and method of manufacturing the same |
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WO2010023727A1 (ja) * | 2008-08-27 | 2010-03-04 | セイコーインスツル株式会社 | 圧電振動子、発振器、電子機器及び電波時計並びに圧電振動子の製造方法 |
WO2010023731A1 (ja) * | 2008-08-27 | 2010-03-04 | セイコーインスツル株式会社 | 圧電振動子、発振器、電子機器及び電波時計、並びに圧電振動子の製造方法 |
WO2010023728A1 (ja) * | 2008-08-27 | 2010-03-04 | セイコーインスツル株式会社 | 圧電振動子の製造方法、圧電振動子、発振器、電子機器および電波時計 |
CN103904041A (zh) * | 2009-02-19 | 2014-07-02 | 日本电气株式会社 | 真空密封封装 |
JP2010251702A (ja) * | 2009-03-27 | 2010-11-04 | Kyocera Corp | 電子部品、パッケージおよび赤外線センサ |
FR2950877B1 (fr) * | 2009-10-07 | 2012-01-13 | Commissariat Energie Atomique | Structure a cavite comportant une interface de collage a base de materiau getter |
JP2011203194A (ja) * | 2010-03-26 | 2011-10-13 | Kyocera Corp | 赤外線センサ |
FR2971083B1 (fr) * | 2011-02-02 | 2014-04-25 | Ulis | Procede d'assemblage et de fermeture hermetique d'un boitier d'encapsulation |
JP5972875B2 (ja) * | 2011-07-14 | 2016-08-17 | 株式会社東芝 | セラミックス回路基板 |
JP6030436B2 (ja) * | 2011-12-27 | 2016-11-24 | 京セラ株式会社 | 電子デバイスの製造方法および電子デバイス製造装置 |
JP5939385B2 (ja) * | 2012-04-13 | 2016-06-22 | 日本電気株式会社 | 赤外線センサパッケージ、赤外線センサモジュール、および電子機器 |
JP2014090118A (ja) * | 2012-10-31 | 2014-05-15 | Kyocera Corp | イメージセンサ用パッケージおよびイメージセンサ |
US9859179B2 (en) * | 2013-09-27 | 2018-01-02 | Kyocera Corporation | Lid body, package, and electronic apparatus |
FR3014241B1 (fr) * | 2013-11-29 | 2017-05-05 | Commissariat Energie Atomique | Structure d'encapsulation comprenant des tranchees partiellement remplies de materiau getter |
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EP2960935A1 (en) | 2015-12-30 |
EP2960935B1 (en) | 2018-04-04 |
US9756731B2 (en) | 2017-09-05 |
WO2014129666A1 (ja) | 2014-08-28 |
EP2960935A4 (en) | 2016-10-12 |
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