JP6133585B2 - Euvフォトレジスト封入 - Google Patents

Euvフォトレジスト封入 Download PDF

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Publication number
JP6133585B2
JP6133585B2 JP2012267237A JP2012267237A JP6133585B2 JP 6133585 B2 JP6133585 B2 JP 6133585B2 JP 2012267237 A JP2012267237 A JP 2012267237A JP 2012267237 A JP2012267237 A JP 2012267237A JP 6133585 B2 JP6133585 B2 JP 6133585B2
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JP
Japan
Prior art keywords
layer
photoresist
silicon
germanium
hard mask
Prior art date
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Active
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JP2012267237A
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English (en)
Japanese (ja)
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JP2013145874A (ja
Inventor
エフライン・アルタミラノ・サンチェス
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Interuniversitair Microelektronica Centrum vzw IMEC
Original Assignee
Interuniversitair Microelektronica Centrum vzw IMEC
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Publication of JP2013145874A publication Critical patent/JP2013145874A/ja
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Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/20Masks or mask blanks for imaging by charged particle beam [CPB] radiation, e.g. by electron beam; Preparation thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Drying Of Semiconductors (AREA)
JP2012267237A 2011-12-21 2012-12-06 Euvフォトレジスト封入 Active JP6133585B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP11194789 2011-12-21
EP11194789.1 2011-12-21
EP12150658.8 2012-01-10
EP20120150658 EP2608247A1 (fr) 2011-12-21 2012-01-10 Encapsulation de photoréserve pour ultraviolet extrême

Publications (2)

Publication Number Publication Date
JP2013145874A JP2013145874A (ja) 2013-07-25
JP6133585B2 true JP6133585B2 (ja) 2017-05-24

Family

ID=45463476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012267237A Active JP6133585B2 (ja) 2011-12-21 2012-12-06 Euvフォトレジスト封入

Country Status (3)

Country Link
US (1) US8883374B2 (fr)
EP (1) EP2608247A1 (fr)
JP (1) JP6133585B2 (fr)

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EP2843696A1 (fr) * 2013-08-27 2015-03-04 IMEC vzw Procédé pour l'implantation de dopant de structures FinFET
JP2015084396A (ja) * 2013-09-19 2015-04-30 東京エレクトロン株式会社 エッチング方法
KR102233577B1 (ko) 2014-02-25 2021-03-30 삼성전자주식회사 반도체 소자의 패턴 형성 방법
US20150340611A1 (en) * 2014-05-21 2015-11-26 Sony Corporation Method for a dry exhumation without oxidation of a cell and source line
JP6817692B2 (ja) * 2015-08-27 2021-01-20 東京エレクトロン株式会社 プラズマ処理方法
US10566212B2 (en) 2016-12-19 2020-02-18 Lam Research Corporation Designer atomic layer etching
US10032633B1 (en) * 2017-01-17 2018-07-24 International Business Machines Corporation Image transfer using EUV lithographic structure and double patterning process
US10796912B2 (en) * 2017-05-16 2020-10-06 Lam Research Corporation Eliminating yield impact of stochastics in lithography
KR102527383B1 (ko) * 2017-09-15 2023-04-28 삼성전자주식회사 핀형 활성 영역을 가지는 반도체 소자
US10656527B2 (en) * 2017-12-21 2020-05-19 International Business Machines Corporation Patterning material film stack with hard mask layer configured to support selective deposition on patterned resist layer
US10658190B2 (en) 2018-09-24 2020-05-19 International Business Machines Corporation Extreme ultraviolet lithography patterning with directional deposition
US11300881B2 (en) 2018-10-23 2022-04-12 International Business Machines Corporation Line break repairing layer for extreme ultraviolet patterning stacks
JP2022507368A (ja) 2018-11-14 2022-01-18 ラム リサーチ コーポレーション 次世代リソグラフィにおいて有用なハードマスクを作製する方法
US11537049B2 (en) * 2019-02-26 2022-12-27 Tokyo Electron Limited Method of line roughness improvement by plasma selective deposition
US10971362B2 (en) 2019-02-27 2021-04-06 International Business Machines Corporation Extreme ultraviolet patterning process with resist hardening
KR20210129739A (ko) 2019-03-18 2021-10-28 램 리써치 코포레이션 극자외선 (Extreme Ultraviolet) 리소그래피 레지스트들의 거칠기 감소
KR20210149893A (ko) 2019-04-30 2021-12-09 램 리써치 코포레이션 극자외선 리소그래피 레지스트 개선을 위한 원자 층 에칭 및 선택적인 증착 프로세스
TWI837391B (zh) 2019-06-26 2024-04-01 美商蘭姆研究公司 利用鹵化物化學品的光阻顯影
US11410852B2 (en) * 2019-11-22 2022-08-09 Tokyo Electron Limited Protective layers and methods of formation during plasma etching processes
US11837471B2 (en) 2019-12-17 2023-12-05 Tokyo Electron Limited Methods of patterning small features
WO2021146138A1 (fr) 2020-01-15 2021-07-22 Lam Research Corporation Sous-couche pour adhésion de résine photosensible et réduction de dose

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US3962004A (en) * 1974-11-29 1976-06-08 Rca Corporation Pattern definition in an organic layer
KR20000037885A (ko) 1998-12-02 2000-07-05 전주범 미세패턴 형성 방법
US6815359B2 (en) * 2001-03-28 2004-11-09 Advanced Micro Devices, Inc. Process for improving the etch stability of ultra-thin photoresist
US6821905B2 (en) * 2002-07-30 2004-11-23 Taiwan Semiconductor Manufacturing Co., Ltd Method for avoiding carbon and nitrogen contamination of a dielectric insulating layer
US6916746B1 (en) * 2003-04-09 2005-07-12 Lam Research Corporation Method for plasma etching using periodic modulation of gas chemistry
US20050118531A1 (en) 2003-12-02 2005-06-02 Hsiu-Chun Lee Method for controlling critical dimension by utilizing resist sidewall protection
KR100590727B1 (ko) * 2004-02-24 2006-06-19 한국기계연구원 임프린트된 나노구조물을 이용한 미세접촉 인쇄기법과이의 나노 구조물
US7482280B2 (en) 2005-08-15 2009-01-27 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming a lithography pattern
US7704680B2 (en) 2006-06-08 2010-04-27 Advanced Micro Devices, Inc. Double exposure technology using high etching selectivity
US20090104566A1 (en) * 2007-10-19 2009-04-23 International Business Machines Corporation Process of multiple exposures with spin castable film
KR20100106501A (ko) * 2007-12-21 2010-10-01 램 리써치 코포레이션 고 식각율 레지스트 마스크를 이용한 식각
US20100040838A1 (en) 2008-08-15 2010-02-18 Abdallah David J Hardmask Process for Forming a Reverse Tone Image
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US8536064B2 (en) * 2010-02-08 2013-09-17 Taiwan Semiconductor Manufacturing Company, Ltd. Double patterning strategy for contact hole and trench in photolithography

Also Published As

Publication number Publication date
JP2013145874A (ja) 2013-07-25
US20130164657A1 (en) 2013-06-27
EP2608247A1 (fr) 2013-06-26
US8883374B2 (en) 2014-11-11

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