JP6054080B2 - 支持体及びその製造方法、配線基板の製造方法、電子部品装置の製造方法、配線構造体 - Google Patents

支持体及びその製造方法、配線基板の製造方法、電子部品装置の製造方法、配線構造体 Download PDF

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Publication number
JP6054080B2
JP6054080B2 JP2012162005A JP2012162005A JP6054080B2 JP 6054080 B2 JP6054080 B2 JP 6054080B2 JP 2012162005 A JP2012162005 A JP 2012162005A JP 2012162005 A JP2012162005 A JP 2012162005A JP 6054080 B2 JP6054080 B2 JP 6054080B2
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JP
Japan
Prior art keywords
layer
support substrate
wiring
support
release layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2012162005A
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English (en)
Japanese (ja)
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JP2014022665A (ja
JP2014022665A5 (enExample
Inventor
小林　和弘
和弘 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2012162005A priority Critical patent/JP6054080B2/ja
Priority to KR1020130084571A priority patent/KR101937717B1/ko
Priority to US13/945,266 priority patent/US9215812B2/en
Priority to TW102125890A priority patent/TWI592062B/zh
Publication of JP2014022665A publication Critical patent/JP2014022665A/ja
Publication of JP2014022665A5 publication Critical patent/JP2014022665A5/ja
Priority to US14/938,157 priority patent/US9763332B2/en
Application granted granted Critical
Publication of JP6054080B2 publication Critical patent/JP6054080B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/12—Using specific substances
    • H05K2203/122—Organic non-polymeric compounds, e.g. oil, wax or thiol
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377—Protective layers
    • H05K2203/1383—Temporary protective insulating layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/23—Sheet including cover or casing
    • Y10T428/239—Complete cover or casing

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2012162005A 2012-07-20 2012-07-20 支持体及びその製造方法、配線基板の製造方法、電子部品装置の製造方法、配線構造体 Expired - Fee Related JP6054080B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2012162005A JP6054080B2 (ja) 2012-07-20 2012-07-20 支持体及びその製造方法、配線基板の製造方法、電子部品装置の製造方法、配線構造体
KR1020130084571A KR101937717B1 (ko) 2012-07-20 2013-07-18 지지체, 지지체 제조 방법, 배선 기판 제조 방법, 전자 부품 제조 방법, 및 배선 구조체
US13/945,266 US9215812B2 (en) 2012-07-20 2013-07-18 Support body, method of manufacturing support body, method of manufacturing wiring board, method of manufacturing electronic component, and wiring structure
TW102125890A TWI592062B (zh) 2012-07-20 2013-07-19 支持體及其製造方法，佈線板之製造方法，電子零件之製造方法，暨佈線構造
US14/938,157 US9763332B2 (en) 2012-07-20 2015-11-11 Support body, method of manufacturing support body, method of manufacturing wiring board, method of manufacturing electronic component, and wiring structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012162005A JP6054080B2 (ja) 2012-07-20 2012-07-20 支持体及びその製造方法、配線基板の製造方法、電子部品装置の製造方法、配線構造体

Publications (3)

Publication Number Publication Date
JP2014022665A JP2014022665A (ja) 2014-02-03
JP2014022665A5 JP2014022665A5 (enExample) 2015-08-06
JP6054080B2 true JP6054080B2 (ja) 2016-12-27

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012162005A Expired - Fee Related JP6054080B2 (ja) 2012-07-20 2012-07-20 支持体及びその製造方法、配線基板の製造方法、電子部品装置の製造方法、配線構造体

Country Status (4)

Country Link
US (2) US9215812B2 (enExample)
JP (1) JP6054080B2 (enExample)
KR (1) KR101937717B1 (enExample)
TW (1) TWI592062B (enExample)

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TWI830474B (zh) * 2021-11-05 2024-01-21 日商揖斐電股份有限公司 配線基板

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US10344567B2 (en) * 2014-06-23 2019-07-09 Rockwell Automation Asia Pacific Business Center Pte. Ltd. Systems and methods for cloud-based automatic configuration of remote terminal units
US20160073505A1 (en) * 2014-09-05 2016-03-10 Unimicron Technology Corp. Manufacturing method of multilayer flexible circuit structure
US10249561B2 (en) * 2016-04-28 2019-04-02 Ibiden Co., Ltd. Printed wiring board having embedded pads and method for manufacturing the same
CN109417055A (zh) * 2016-07-01 2019-03-01 三菱瓦斯化学株式会社 半导体元件搭载用封装体基板的制造方法和半导体元件安装基板的制造方法
CN106211638B (zh) * 2016-07-26 2018-07-24 上海美维科技有限公司 一种超薄多层印制电路板的加工方法
KR102396894B1 (ko) * 2016-08-05 2022-05-11 미츠비시 가스 가가쿠 가부시키가이샤 지지 기판, 지지 기판이 부착된 적층체 및 반도체 소자 탑재용 패키지 기판의 제조 방법
CN109788665B (zh) * 2017-11-14 2020-07-31 何崇文 含电子元件的线路基板及其制作方法
CN113243146B (zh) 2018-12-14 2024-11-19 三菱瓦斯化学株式会社 半导体元件搭载用封装基板的制造方法
US10624213B1 (en) * 2018-12-20 2020-04-14 Intel Corporation Asymmetric electronic substrate and method of manufacture
JP7521258B2 (ja) * 2020-05-26 2024-07-24 Ｔｏｐｐａｎホールディングス株式会社 基板ユニット、基板ユニットの製造方法及び半導体装置の製造方法
TW202211748A (zh) * 2020-09-11 2022-03-16 巨擘科技股份有限公司 能被精確剝除之多層基板結構及其製造方法
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TWI830474B (zh) * 2021-11-05 2024-01-21 日商揖斐電股份有限公司 配線基板

Also Published As

Publication number Publication date
JP2014022665A (ja) 2014-02-03
US9763332B2 (en) 2017-09-12
US20140020931A1 (en) 2014-01-23
TWI592062B (zh) 2017-07-11
KR101937717B1 (ko) 2019-01-11
KR20140011963A (ko) 2014-01-29
US9215812B2 (en) 2015-12-15
US20160066433A1 (en) 2016-03-03
TW201412201A (zh) 2014-03-16

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