JP5986399B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP5986399B2 JP5986399B2 JP2012044300A JP2012044300A JP5986399B2 JP 5986399 B2 JP5986399 B2 JP 5986399B2 JP 2012044300 A JP2012044300 A JP 2012044300A JP 2012044300 A JP2012044300 A JP 2012044300A JP 5986399 B2 JP5986399 B2 JP 5986399B2
- Authority
- JP
- Japan
- Prior art keywords
- line
- region
- exposure
- boundary line
- portions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012044300A JP5986399B2 (ja) | 2012-02-29 | 2012-02-29 | 半導体装置の製造方法 |
| US13/772,440 US9081284B2 (en) | 2012-02-29 | 2013-02-21 | Method of manufacturing forming conductive line pattern in boundary region |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012044300A JP5986399B2 (ja) | 2012-02-29 | 2012-02-29 | 半導体装置の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013182942A JP2013182942A (ja) | 2013-09-12 |
| JP2013182942A5 JP2013182942A5 (enExample) | 2015-04-16 |
| JP5986399B2 true JP5986399B2 (ja) | 2016-09-06 |
Family
ID=49001948
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012044300A Expired - Fee Related JP5986399B2 (ja) | 2012-02-29 | 2012-02-29 | 半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9081284B2 (enExample) |
| JP (1) | JP5986399B2 (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6497056B2 (ja) * | 2014-12-12 | 2019-04-10 | 三菱電機株式会社 | 液晶表示装置の製造方法 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5595843A (en) * | 1995-03-30 | 1997-01-21 | Intel Corporation | Layout methodology, mask set, and patterning method for phase-shifting lithography |
| JP3375828B2 (ja) * | 1996-06-19 | 2003-02-10 | 三菱電機株式会社 | 半導体装置の製法および該製法に用いられるフォトマスク |
| KR100502797B1 (ko) * | 1997-12-01 | 2005-10-19 | 삼성전자주식회사 | 액정 표시 장치 및 그의 제조 방법 |
| US7256873B2 (en) * | 2004-01-28 | 2007-08-14 | Asml Netherlands B.V. | Enhanced lithographic resolution through double exposure |
| JP5106747B2 (ja) * | 2004-10-27 | 2012-12-26 | ルネサスエレクトロニクス株式会社 | パターン形成方法、半導体装置の製造方法及び露光用マスクセット |
| KR100763227B1 (ko) * | 2006-04-04 | 2007-10-04 | 삼성전자주식회사 | 분리 노광 방법을 이용한 포토마스크와 그 제조 방법 및 제조 장치 |
| JP5214904B2 (ja) * | 2007-04-12 | 2013-06-19 | ルネサスエレクトロニクス株式会社 | 固体撮像素子の製造方法 |
| JP2009049161A (ja) * | 2007-08-20 | 2009-03-05 | Fujitsu Microelectronics Ltd | ショット分割繋ぎ位置選択方法及びショット分割露光システム |
| JP2009145681A (ja) | 2007-12-14 | 2009-07-02 | Hitachi Displays Ltd | 表示装置の製造方法 |
| JP2013033870A (ja) | 2011-08-02 | 2013-02-14 | Canon Inc | 半導体デバイスおよびその製造方法 |
-
2012
- 2012-02-29 JP JP2012044300A patent/JP5986399B2/ja not_active Expired - Fee Related
-
2013
- 2013-02-21 US US13/772,440 patent/US9081284B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US9081284B2 (en) | 2015-07-14 |
| US20130221515A1 (en) | 2013-08-29 |
| JP2013182942A (ja) | 2013-09-12 |
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