JP5954871B2 - 半導体装置の製造方法並びにそれに用いられる半導体素子搭載用基板とその製造方法 - Google Patents
半導体装置の製造方法並びにそれに用いられる半導体素子搭載用基板とその製造方法 Download PDFInfo
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- JP5954871B2 JP5954871B2 JP2012193946A JP2012193946A JP5954871B2 JP 5954871 B2 JP5954871 B2 JP 5954871B2 JP 2012193946 A JP2012193946 A JP 2012193946A JP 2012193946 A JP2012193946 A JP 2012193946A JP 5954871 B2 JP5954871 B2 JP 5954871B2
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- 239000004065 semiconductor Substances 0.000 title claims description 88
- 239000000758 substrate Substances 0.000 title claims description 40
- 238000004519 manufacturing process Methods 0.000 title claims description 30
- 238000007747 plating Methods 0.000 claims description 99
- 229910052751 metal Inorganic materials 0.000 claims description 50
- 239000002184 metal Substances 0.000 claims description 50
- 238000007789 sealing Methods 0.000 claims description 36
- 239000011347 resin Substances 0.000 claims description 35
- 229920005989 resin Polymers 0.000 claims description 35
- 238000000034 method Methods 0.000 claims description 28
- 238000005530 etching Methods 0.000 claims description 27
- 229910000510 noble metal Inorganic materials 0.000 claims description 23
- 229910045601 alloy Inorganic materials 0.000 claims description 2
- 239000000956 alloy Substances 0.000 claims description 2
- 230000002093 peripheral effect Effects 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 description 11
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 9
- 238000011161 development Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 8
- 239000010931 gold Substances 0.000 description 5
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 239000010970 precious metal Substances 0.000 description 2
- 229910000029 sodium carbonate Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- QKSIFUGZHOUETI-UHFFFAOYSA-N copper;azane Chemical compound N.N.N.N.[Cu+2] QKSIFUGZHOUETI-UHFFFAOYSA-N 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
2 レジストマスク
3 貴金属めっき
4 柱状部
5 半導体
6 ワイヤボンディング
7 封止樹脂
8 外部接続端子部
9 外装めっき
10 金属板
Claims (5)
- 表面側に半導体素子の実装とワイヤボンディングをして前記表面側を樹脂封止した後、裏面側からのエッチング加工によって不要な部分を除去するようにした半導体装置の製造に用いられる金属板製の半導体素子搭載用基板であって、
前記金属板の前記表面側は凹部により柱状部が形成された状態であり、且つ前記柱状部の上面には該上面の周辺部が残るようにワイヤボンディング用の貴金属めっきが形成され、また前記裏面側は外部接続端子部として最終的に外装めっきが必要となる部分に前記外部接続端子部として必要な形状のレジストマスクが前記金属板面に直接形成されていることを特徴とする半導体素子搭載用基板。 - 前記ワイヤボンディング用の貴金属めっきはAuめっき、Agめっき、Pdめっきまたはこれらの合金めっきのうちの少なくとも一種類が形成されていることを特徴とする請求項1に記載の半導体素子搭載用基板。
- 請求項1または2記載の半導体素子搭載用基板を用いた半導体装置の製造方法であって、
前記半導体素子搭載用基板の表面側に半導体素子の搭載およびワイヤボンディングを行う工程と、
前記半導体素子の搭載とワイヤボンディングを行った前記半導体素子搭載用基板の表面側を樹脂封止する工程と、
前記半導体素子搭載用基板の裏面側からエッチング処理を行なうことで、レジストマスクが形成されている外部接続端子部を個々に独立させ前記樹脂封止工程により形成された封止樹脂部分から突出させる工程と、
前記レジストマスクを剥離する工程と、
前記封止樹脂部分から突出して個々に独立した前記外部接続端子部に所定の外装めっきを形成する工程を順次経ることを特徴とする半導体装置の製造方法。 - 前記外装めっきは、前記封止樹脂部分から突出している個々に独立した前記外部接続端子部全体を被覆するように形成されていることを特徴とする請求項3に記載の半導体装置の製造方法。
- 表面側に半導体素子の実装とワイヤボンディングをして前記表面側を樹脂封止した後、裏面側からのエッチング加工によって不要な部分を除去するようにした半導体装置の製造方法に用いられる金属板製の半導体素子搭載用基板の製造方法であって、
前記金属板の前記表面側にワイヤボンディング用のめっきを形成する工程と、
前記金属板の前記表面側に形成しためっきを覆うレジストマスクを形成し、前記裏面側は全面を覆うレジストマスクを形成する工程と、
前記金属板の前記表面側に露出している前記金属板をハーフエッチングして柱状部を形成する工程と、
前記金属板の前記裏面側で外部接続端子部となる所定の部分の前記金属板面に直接レジストマスクを形成する工程を順次経ることを特徴とする半導体素子搭載用基板の製造方法。
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KR102070851B1 (ko) * | 2017-08-04 | 2020-01-29 | 한국산업기술대학교산학협력단 | 나노로드 구조를 이용한 초음파 지문센서의 제조방법 |
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JP2009164232A (ja) * | 2007-12-28 | 2009-07-23 | Mitsui High Tec Inc | 半導体装置及びその製造方法並びにリードフレーム及びその製造方法 |
JP2011108818A (ja) * | 2009-11-17 | 2011-06-02 | Mitsui High Tec Inc | リードフレームの製造方法および半導体装置の製造方法 |
US8420508B2 (en) * | 2010-03-17 | 2013-04-16 | Stats Chippac Ltd. | Integrated circuit packaging system with bump contact on package leads and method of manufacture thereof |
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