JP5946966B2 - マルチゲート薄膜トランジスタ - Google Patents
マルチゲート薄膜トランジスタ Download PDFInfo
- Publication number
- JP5946966B2 JP5946966B2 JP2015524306A JP2015524306A JP5946966B2 JP 5946966 B2 JP5946966 B2 JP 5946966B2 JP 2015524306 A JP2015524306 A JP 2015524306A JP 2015524306 A JP2015524306 A JP 2015524306A JP 5946966 B2 JP5946966 B2 JP 5946966B2
- Authority
- JP
- Japan
- Prior art keywords
- gate electrode
- semiconductor layer
- control signal
- conductive
- response
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6733—Multi-gate TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6733—Multi-gate TFTs
- H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13069—Thin film transistor [TFT]
Landscapes
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/557,039 | 2012-07-24 | ||
| US13/557,039 US9105728B2 (en) | 2012-07-24 | 2012-07-24 | Multi-gate thin-film transistor |
| PCT/US2013/050273 WO2014018282A1 (en) | 2012-07-24 | 2013-07-12 | Multi-gate thin-film transistor |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2015524618A JP2015524618A (ja) | 2015-08-24 |
| JP2015524618A5 JP2015524618A5 (cg-RX-API-DMAC7.html) | 2015-11-26 |
| JP5946966B2 true JP5946966B2 (ja) | 2016-07-06 |
Family
ID=48874539
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015524306A Expired - Fee Related JP5946966B2 (ja) | 2012-07-24 | 2013-07-12 | マルチゲート薄膜トランジスタ |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9105728B2 (cg-RX-API-DMAC7.html) |
| JP (1) | JP5946966B2 (cg-RX-API-DMAC7.html) |
| KR (1) | KR101662733B1 (cg-RX-API-DMAC7.html) |
| CN (1) | CN104508829B (cg-RX-API-DMAC7.html) |
| TW (1) | TWI590458B (cg-RX-API-DMAC7.html) |
| WO (1) | WO2014018282A1 (cg-RX-API-DMAC7.html) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8945981B2 (en) * | 2008-07-31 | 2015-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| EP2887692B1 (en) * | 2013-12-20 | 2019-07-10 | Valencell, Inc. | A fitting system for a headphone with physiological sensor |
| IN2014DE00708A (cg-RX-API-DMAC7.html) * | 2014-03-12 | 2015-09-18 | Indian Inst Technology Kanpur | |
| US20150366678A1 (en) * | 2014-06-20 | 2015-12-24 | Fillauer Llc | Modular forearm |
| CN106662899B (zh) * | 2015-06-26 | 2018-05-11 | 沙特基础工业全球技术公司 | 用于触摸输入和触觉反馈应用的集成式压电悬臂致动器和晶体管 |
| GB201819570D0 (en) * | 2018-11-30 | 2019-01-16 | Univ Surrey | Multiple-gate transistor |
| KR102879031B1 (ko) | 2020-01-15 | 2025-10-29 | 삼성전자주식회사 | 반도체 소자 및 이의 제조 방법 |
| US11469321B2 (en) | 2020-02-27 | 2022-10-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device |
| JP2025514022A (ja) * | 2022-05-16 | 2025-05-02 | オーレッドワークス エルエルシー | 静電気放電保護付き分割oled |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0682834A (ja) * | 1992-09-02 | 1994-03-25 | Fuji Xerox Co Ltd | アクティブマトリクスパネル |
| US5929464A (en) | 1995-01-20 | 1999-07-27 | Semiconductor Energy Laboratory Co., Ltd. | Active matrix electro-optical device |
| JP3409542B2 (ja) | 1995-11-21 | 2003-05-26 | ソニー株式会社 | 半導体装置の製造方法 |
| TW463384B (en) | 2000-06-15 | 2001-11-11 | Shr Min | Thin film transistor having subgate and Schottky source/drain and the manufacturing method thereof |
| US6580633B2 (en) | 2000-09-28 | 2003-06-17 | Seiko Epson Corporation | Nonvolatile semiconductor memory device |
| KR100485531B1 (ko) * | 2002-04-15 | 2005-04-27 | 엘지.필립스 엘시디 주식회사 | 다결정 실리콘 박막트랜지스터와 그 제조방법 |
| CN100449779C (zh) | 2002-10-07 | 2009-01-07 | 株式会社半导体能源研究所 | 半导体器件及其制造方法 |
| US7800675B2 (en) | 2004-08-25 | 2010-09-21 | Aptina Imaging Corporation | Method of operating a storage gate pixel |
| KR100614653B1 (ko) | 2004-11-18 | 2006-08-22 | 삼성전자주식회사 | 백점 및 오버플로우의 문제없이 글로벌 노출이 가능한씨모스 이미지 센서 및 그 제조 방법 |
| KR100790586B1 (ko) | 2006-05-25 | 2008-01-02 | (주) 픽셀플러스 | Cmos 이미지 센서 액티브 픽셀 및 그 신호 감지 방법 |
| US7459755B2 (en) | 2006-05-25 | 2008-12-02 | Walker Andrew J | Dual-gate semiconductor devices with enhanced scalability |
| US8102443B2 (en) | 2007-03-13 | 2012-01-24 | Renesas Electronics Corporation | CCD image sensor having charge storage section between photodiode section and charge transfer section |
| US20090072313A1 (en) | 2007-09-19 | 2009-03-19 | International Business Machines Corporation | Hardened transistors in soi devices |
| US20120153289A1 (en) * | 2009-09-01 | 2012-06-21 | Sharp Kabushiki Kaisha | Semiconductor device, active matrix substrate, and display device |
| KR101056229B1 (ko) | 2009-10-12 | 2011-08-11 | 삼성모바일디스플레이주식회사 | 박막 트랜지스터, 그의 제조 방법 및 박막 트랜지스터를 구비하는 유기전계발광 표시 장치 |
| DE102010002455B4 (de) | 2010-02-26 | 2017-06-01 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Nichtflüchtiger Speichertransistor und Verfahren zu dessen Herstellung |
-
2012
- 2012-07-24 US US13/557,039 patent/US9105728B2/en active Active
-
2013
- 2013-07-12 JP JP2015524306A patent/JP5946966B2/ja not_active Expired - Fee Related
- 2013-07-12 CN CN201380038720.0A patent/CN104508829B/zh not_active Expired - Fee Related
- 2013-07-12 KR KR1020157004151A patent/KR101662733B1/ko not_active Expired - Fee Related
- 2013-07-12 WO PCT/US2013/050273 patent/WO2014018282A1/en not_active Ceased
- 2013-07-17 TW TW102125604A patent/TWI590458B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR20150034273A (ko) | 2015-04-02 |
| US20140027758A1 (en) | 2014-01-30 |
| KR101662733B1 (ko) | 2016-10-06 |
| TWI590458B (zh) | 2017-07-01 |
| CN104508829A (zh) | 2015-04-08 |
| TW201413962A (zh) | 2014-04-01 |
| US9105728B2 (en) | 2015-08-11 |
| WO2014018282A1 (en) | 2014-01-30 |
| JP2015524618A (ja) | 2015-08-24 |
| CN104508829B (zh) | 2016-10-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5946966B2 (ja) | マルチゲート薄膜トランジスタ | |
| US9761732B2 (en) | Tunnel thin film transistor with hetero-junction structure | |
| TWI534782B (zh) | 用於驅動一類比干涉調變器之系統、裝置及方法 | |
| JP6339502B2 (ja) | アモルファス酸化物半導体薄膜トランジスタ作製方法 | |
| CN105264592A (zh) | 以反馈晶体管减少浮动节点漏电流 | |
| TWI542151B (zh) | 全n型電晶體反相器電路 | |
| US20170287943A1 (en) | High aperture ratio display by introducing transparent storage capacitor and via hole | |
| US20150348491A1 (en) | Robust driver with multi-level output | |
| US20150349000A1 (en) | Fabrication of transistor with high density storage capacitor | |
| US20160267854A1 (en) | Driver circuit with reduced leakage | |
| TW201515986A (zh) | 併入三維微機電系統結構之薄膜電晶體 | |
| KR20140052059A (ko) | 실리사이드 갭 박막 트랜지스터 | |
| JP2016518617A (ja) | 配線を支持する高設開口層を組み込むディスプレイ装置 | |
| CN106463092A (zh) | 用于利用具有重置的直流共同以驱动模拟干涉调制器的系统、装置及方法 | |
| TW201502576A (zh) | 合併平面外運動限制特徵之快門總成 | |
| TWI624687B (zh) | 使用極性反轉之顯示元件重設 | |
| US9293076B2 (en) | Dot inversion configuration |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A529 | Written submission of copy of amendment under article 34 pct |
Free format text: JAPANESE INTERMEDIATE CODE: A529 Effective date: 20150306 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20151007 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20151007 |
|
| A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20151007 |
|
| A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20151027 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20151102 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160127 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160509 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160601 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5946966 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| LAPS | Cancellation because of no payment of annual fees |