JP5861711B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
- Publication number
- JP5861711B2 JP5861711B2 JP2013530071A JP2013530071A JP5861711B2 JP 5861711 B2 JP5861711 B2 JP 5861711B2 JP 2013530071 A JP2013530071 A JP 2013530071A JP 2013530071 A JP2013530071 A JP 2013530071A JP 5861711 B2 JP5861711 B2 JP 5861711B2
- Authority
- JP
- Japan
- Prior art keywords
- control terminal
- resin
- opening
- resin case
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 80
- 238000004519 manufacturing process Methods 0.000 title claims description 37
- 239000011347 resin Substances 0.000 claims description 371
- 229920005989 resin Polymers 0.000 claims description 371
- 239000000758 substrate Substances 0.000 claims description 74
- 239000000853 adhesive Substances 0.000 claims description 25
- 230000001070 adhesive effect Effects 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 16
- 239000007788 liquid Substances 0.000 claims description 13
- 238000003780 insertion Methods 0.000 claims description 4
- 230000037431 insertion Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 20
- 230000017525 heat dissipation Effects 0.000 description 19
- 229910000679 solder Inorganic materials 0.000 description 7
- 230000005855 radiation Effects 0.000 description 5
- 238000003825 pressing Methods 0.000 description 3
- 239000010949 copper Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 210000001503 joint Anatomy 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/049—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/147—Semiconductor insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/02—Details
- H05K5/0247—Electrical details of casings, e.g. terminals, passages for cables or wiring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Materials Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
本発明にかかる半導体装置の構成について、図1〜6を参照して説明する。図1は、この発明の実施の形態1にかかる半導体装置の要部の構成を示す説明図である。図1(a)は、実施の形態1にかかる半導体装置100の上面図である。図1(b)は、図1(a)のX−X線で切断した側面図である。図1(c)は、図1(a)の矢印A方向から見た主端子43の正面図である。図1(d)は、図1(b)の矩形枠で囲む部分Bを詳細に示す断面図である。この半導体装置100は、例えばIGBTモジュールなどである。
本発明にかかる半導体装置の製造方法について詳細に説明する。図7〜10は、この発明の実施の形態2にかかる半導体装置の製造途中の状態を示す説明図である。実施の形態2にかかる半導体装置の製造方法は、図1〜6に示す実施の形態1にかかる半導体装置100の製造方法である。図7〜10において、(a)は半導体装置100の全体の断面図であり、(b)は制御端子13付近の上面拡大図である。
実施の形態3として本発明にかかる半導体装置の別の構成について、図11,12を用いて説明する。図11,12は、この発明の実施の形態3にかかる半導体装置の要部の構成を示す説明図である。実施の形態3にかかる半導体装置は、図1〜6に示す実施の形態1にかかる半導体装置の変形例である。図11には、図1の樹脂ケースの制御端子付近の要部の別の構成を示す。図11(a)は樹脂ケース1の上面図である。図11(b)は図11(a)を矢印E方向から見た樹脂ケース1の正面図である。図12には、図1の制御端子を位置決めし固定する樹脂ブロックの別の構成を示す。図12(a)は樹脂ブロック21の上面図である。図12(b)は樹脂ブロック21の下面図である。図12(c)は樹脂ブロック21の側面図である。
2,2a,2b 制御端子用の開口部
3 梁部
4 貫通孔
5 開口部の側壁
6 第1凹部
7 第2凹部
8 第1庇部
9 第2庇部
10 第3凹部
11 液溜め部
13 制御端子
13a 制御端子の直立部
13b 制御端子の連結部
13c 制御端子の接合部
14 側端面
15 平板面
16 第1突起部
17 第2突起部
18 谷間
21,21a,21b 樹脂ブロック
22 樹脂ブロックの側面
23 第3突起部
24 樹脂ブロックの底面
25 第4突起部
26 樹脂ブロックの側面の凸状の段差部
26a 樹脂ブロックの側面の凸状の段差部のテーパー状の上面
27 凸状の段差部の前方端部
28 樹脂ブロックの前方端部
29 樹脂ブロックの凹部の溝
30 第5突起部(凹部10に嵌合する)
31 繋ぎ手
32 樹脂ケースの開口部近傍の点線
41 放熱ベース
42 導電パターン付き絶縁基板
43 主端子
44 主端子用の開口部
45 ナットグローブ
46 主端子の足
47 接着剤
47a 液状の接着剤
47b 固化した接着剤
Claims (10)
- 導電パターン付き絶縁基板に固着した制御端子と、
前記制御端子に形成された第1突起部と、
前記第1突起部と離れて前記制御端子に形成された第2突起部と、
前記第1突起部と前記第2突起部とで形成された凹状の谷間と、
前記導電パターン付き絶縁基板を覆うように配置され、前記制御端子が貫通する開口部を有する樹脂ケースと、
前記樹脂ケースの前記開口部の側壁に形成された第1凹部と、
前記樹脂ケースの前記開口部の底部に配置された梁部と、
前記梁部に形成された第2凹部と、
前記樹脂ケースの前記開口部に挿入され、前記樹脂ケースの前記開口部の側壁との間に前記制御端子を挟み込み、当該制御端子を前記樹脂ケースに固定する樹脂ブロックと、
前記樹脂ブロックに形成され、前記制御端子の前記谷間に嵌合する凸状の段差部と、
前記樹脂ブロックの側面に形成され、前記第1凹部に嵌合する第3突起部と、
前記樹脂ブロックの底面に形成され、前記第2凹部に嵌合する第4突起部と、
を備えることを特徴とする半導体装置。 - 前記樹脂ブロックの底面と前記梁部とが接着剤で固定されていることを特徴とする請求項1に記載の半導体装置。
- 液状の前記接着剤が前記制御端子側に流れ出すことを防止する液溜め部が前記梁部に設けられていることを特徴とする請求項2に記載の半導体装置。
- 導電パターン付き絶縁基板に固着した制御端子と、
前記導電パターン付き絶縁基板を覆うように配置され、前記制御端子が貫通する開口部を有する樹脂ケースと、
前記樹脂ケースの前記開口部の側壁の上側に形成され、前記開口部の内側に向かって突出する第1段差部と、
前記樹脂ケースの前記開口部に挿入され、前記樹脂ケースの前記開口部の側壁との間に前記制御端子を挟み込み、当該制御端子を前記樹脂ケースに固定する樹脂ブロックと、
前記樹脂ブロックの側面に形成され、テーパー状の上面が前記第1段差部に接触して嵌合される凸状の第2段差部と、
を備えることを特徴とする半導体装置。 - 導電パターン付き絶縁基板に固着した制御端子と、
前記導電パターン付き絶縁基板を覆うように配置され、前記制御端子が貫通する開口部を有する樹脂ケースと、
前記樹脂ケースの前記開口部に挿入され、前記制御端子の一部に接触し、前記制御端子の位置を決める樹脂ブロックと、
を備え、
前記制御端子は、前記樹脂ブロックとの接触により、当該制御端子の一部をあらかじめ定めた位置まで回動可能であることを特徴とする半導体装置。 - 導電パターン付き絶縁基板に固着した制御端子と、前記導電パターン付き絶縁基板を覆うように配置され、前記制御端子が貫通する開口部を有する樹脂ケースと、を備えた半導体装置の製造方法であって、
前記樹脂ケースの前記開口部から前記制御端子の一部が露出されるように前記制御端子を前記開口部に貫通させて、前記導電パターン付き絶縁基板を前記樹脂ケースで覆う工程と、
前記樹脂ケースの前記開口部に樹脂ブロックを挿設し、当該樹脂ブロックの側面に形成された凸状の段差部を前記制御端子の2つの突起部の間の凹状の谷間に嵌合させ、かつ、前記樹脂ブロックの側面に形成された突起部を前記樹脂ケースの前記開口部の側壁に形成された凹部に嵌合させ、さらに、前記樹脂ブロックの底面に形成された突起部を前記樹脂ケースの前記開口部の底部の梁部に形成された凹部に嵌合させて、前記制御端子を位置決めし固定する工程と、
を含むことを特徴とする半導体装置の製造方法。 - 前記梁部に接着剤を塗布して、前記樹脂ブロックを前記樹脂ケースに接着する工程をさらに含むことを特徴とする請求項6に記載の半導体装置の製造方法。
- 導電パターン付き絶縁基板に固着した制御端子と、
前記導電パターン付き絶縁基板を覆うように配置され、前記制御端子が貫通する開口部を有する樹脂ケースと、
を備えた半導体装置の製造方法であって、
前記導電パターン付き絶縁基板を前記樹脂ケースで覆い、前記樹脂ケースの前記開口部に前記制御端子の一部を貫通させる工程と、
前記樹脂ケースの前記開口部に樹脂ブロックを挿入し、前記樹脂ブロックを前記制御端子の一部に接触させて予め定めた位置まで回動させることにより、前記制御端子の位置を決める工程と、
を含むことを特徴とする半導体装置の製造方法。 - 前記樹脂ブロックの挿入方向前方における前記樹脂ケースの前記開口部の側壁に前記制御端子が接触するまで、前記樹脂ブロックによって前記制御端子の一部を回動させることを特徴とする請求項8に記載の半導体装置の製造方法。
- 前記樹脂ブロックの側面に形成された凸状の段差部のテーパー状の上面を、前記樹脂ケースの前記開口部の側壁の上側において前記開口部の内側に向かって突出する段差部に嵌合させ、前記樹脂ブロックを前記樹脂ケースに固定することを特徴とする請求項8または9に記載の半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013530071A JP5861711B2 (ja) | 2011-08-25 | 2012-08-24 | 半導体装置および半導体装置の製造方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011183836 | 2011-08-25 | ||
JP2011183836 | 2011-08-25 | ||
PCT/JP2012/071440 WO2013027826A1 (ja) | 2011-08-25 | 2012-08-24 | 半導体装置および半導体装置の製造方法 |
JP2013530071A JP5861711B2 (ja) | 2011-08-25 | 2012-08-24 | 半導体装置および半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2013027826A1 JPWO2013027826A1 (ja) | 2015-03-19 |
JP5861711B2 true JP5861711B2 (ja) | 2016-02-16 |
Family
ID=47746561
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013530071A Active JP5861711B2 (ja) | 2011-08-25 | 2012-08-24 | 半導体装置および半導体装置の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US9078355B2 (ja) |
EP (1) | EP2750187B1 (ja) |
JP (1) | JP5861711B2 (ja) |
CN (1) | CN103650138B (ja) |
WO (1) | WO2013027826A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101720450B1 (ko) * | 2013-03-21 | 2017-03-27 | 미쓰비시덴키 가부시키가이샤 | 반도체 장치 |
JP6057016B2 (ja) * | 2014-03-19 | 2017-01-11 | 富士電機株式会社 | 半導体装置及びその製造方法 |
JP6233528B2 (ja) * | 2014-10-14 | 2017-11-22 | 富士電機株式会社 | 半導体装置 |
CN106796934B (zh) * | 2015-04-10 | 2019-12-10 | 富士电机株式会社 | 半导体装置 |
JP6578795B2 (ja) * | 2015-08-04 | 2019-09-25 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
CN106684043B (zh) * | 2016-12-13 | 2019-05-03 | 华润微电子(重庆)有限公司 | 一种防静电igbt模块 |
USD949808S1 (en) * | 2020-11-27 | 2022-04-26 | Sansha Electric Manufacturing Co., Ltd. | Semiconductor device |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2867753B2 (ja) * | 1991-02-25 | 1999-03-10 | 富士電機株式会社 | 半導体装置 |
JP3120575B2 (ja) * | 1992-06-29 | 2000-12-25 | 富士電機株式会社 | 半導体装置 |
JPH06268102A (ja) * | 1993-01-13 | 1994-09-22 | Fuji Electric Co Ltd | 樹脂封止形半導体装置 |
JP2973799B2 (ja) | 1993-04-23 | 1999-11-08 | 富士電機株式会社 | パワートランジスタモジュール |
JPH087956A (ja) | 1994-06-23 | 1996-01-12 | Fuji Electric Co Ltd | 半導体装置の端子組立構造 |
JP3025083U (ja) | 1995-11-22 | 1996-06-07 | 富士電機株式会社 | 半導体装置の端子構造 |
JP3610749B2 (ja) | 1997-12-04 | 2005-01-19 | 富士電機デバイステクノロジー株式会社 | 半導体装置のパッケージおよびその製作方法並びにこれを用いた半導体装置 |
JP2000183276A (ja) * | 1998-12-15 | 2000-06-30 | Mitsubishi Electric Corp | 半導体パワーモジュール |
JP3519300B2 (ja) | 1999-01-11 | 2004-04-12 | 富士電機デバイステクノロジー株式会社 | パワーモジュールのパッケージ構造 |
EP1169736B1 (de) | 1999-03-17 | 2006-07-12 | EUPEC Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG | Leistungshalbleitermodul |
JP4349437B2 (ja) * | 2007-06-04 | 2009-10-21 | 株式会社デンソー | 電子装置の製造方法 |
US7768109B2 (en) * | 2007-08-24 | 2010-08-03 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
US7816781B2 (en) * | 2007-10-02 | 2010-10-19 | Infineon Technologies Ag | Power semiconductor module |
JP5113815B2 (ja) * | 2009-09-18 | 2013-01-09 | 株式会社東芝 | パワーモジュール |
-
2012
- 2012-08-24 US US14/232,780 patent/US9078355B2/en active Active
- 2012-08-24 EP EP12825504.9A patent/EP2750187B1/en active Active
- 2012-08-24 WO PCT/JP2012/071440 patent/WO2013027826A1/ja active Application Filing
- 2012-08-24 CN CN201280034713.9A patent/CN103650138B/zh active Active
- 2012-08-24 JP JP2013530071A patent/JP5861711B2/ja active Active
-
2015
- 2015-05-04 US US14/703,313 patent/US9136225B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20140168922A1 (en) | 2014-06-19 |
US9136225B2 (en) | 2015-09-15 |
EP2750187B1 (en) | 2020-01-01 |
JPWO2013027826A1 (ja) | 2015-03-19 |
US20150235965A1 (en) | 2015-08-20 |
CN103650138B (zh) | 2016-06-22 |
WO2013027826A1 (ja) | 2013-02-28 |
EP2750187A4 (en) | 2015-08-05 |
EP2750187A1 (en) | 2014-07-02 |
CN103650138A (zh) | 2014-03-19 |
US9078355B2 (en) | 2015-07-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5861711B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP3793628B2 (ja) | 樹脂封止型半導体装置 | |
US9171768B2 (en) | Semiconductor device | |
JP5626472B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP2008159955A (ja) | 電子部品内蔵基板 | |
JP7267767B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP3993302B2 (ja) | 半導体装置 | |
JP4588060B2 (ja) | 半導体装置及びその製造方法 | |
JP7232123B2 (ja) | 配線基板、電子装置、及び配線基板の製造方法 | |
JP4624775B2 (ja) | 半導体装置 | |
JP2002026195A (ja) | 樹脂封止型半導体装置及びその製造方法 | |
JP2005353854A (ja) | 配線基板およびそれを用いた半導体装置 | |
JP2005167072A (ja) | 半導体装置およびその製造方法 | |
JPH06204385A (ja) | 半導体素子搭載ピングリッドアレイパッケージ基板 | |
JP6390803B2 (ja) | 半導体モジュール | |
JP5217013B2 (ja) | 電力変換装置およびその製造方法 | |
JP5124329B2 (ja) | 半導体装置 | |
CN114556534A (zh) | 半导体装置及半导体装置的制造方法 | |
JP7252386B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP2002359336A (ja) | 半導体装置 | |
JP5037398B2 (ja) | 半導体装置 | |
TWI706703B (zh) | 電子模組 | |
JP2009088536A (ja) | ソケット機能を備えた半導体パッケージ、半導体モジュール | |
JP2010040846A (ja) | 半導体装置及び半導体装置の製造方法 | |
JP2007059547A (ja) | 半導体チップおよび半導体チップの製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150818 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20151019 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20151124 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20151207 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5861711 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |