JP5710955B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5710955B2 JP5710955B2 JP2010275370A JP2010275370A JP5710955B2 JP 5710955 B2 JP5710955 B2 JP 5710955B2 JP 2010275370 A JP2010275370 A JP 2010275370A JP 2010275370 A JP2010275370 A JP 2010275370A JP 5710955 B2 JP5710955 B2 JP 5710955B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- semiconductor device
- pads
- pass filter
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 43
- 239000000872 buffer Substances 0.000 claims description 62
- 238000006243 chemical reaction Methods 0.000 claims description 12
- 239000003990 capacitor Substances 0.000 claims description 8
- 230000001902 propagating effect Effects 0.000 claims description 4
- 230000002093 peripheral effect Effects 0.000 description 21
- 238000010586 diagram Methods 0.000 description 15
- ORQBXQOJMQIAOY-UHFFFAOYSA-N nobelium Chemical compound [No] ORQBXQOJMQIAOY-UHFFFAOYSA-N 0.000 description 5
- 230000000295 complement effect Effects 0.000 description 3
- 101150110971 CIN7 gene Proteins 0.000 description 2
- 101150110298 INV1 gene Proteins 0.000 description 2
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 101150070189 CIN3 gene Proteins 0.000 description 1
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 1
- 101100508840 Daucus carota INV3 gene Proteins 0.000 description 1
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Dram (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010275370A JP5710955B2 (ja) | 2010-12-10 | 2010-12-10 | 半導体装置 |
| US13/315,553 US20120146409A1 (en) | 2010-12-10 | 2011-12-09 | Semiconductor device having data output buffers |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010275370A JP5710955B2 (ja) | 2010-12-10 | 2010-12-10 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012123881A JP2012123881A (ja) | 2012-06-28 |
| JP2012123881A5 JP2012123881A5 (enExample) | 2012-09-27 |
| JP5710955B2 true JP5710955B2 (ja) | 2015-04-30 |
Family
ID=46198610
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010275370A Expired - Fee Related JP5710955B2 (ja) | 2010-12-10 | 2010-12-10 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20120146409A1 (enExample) |
| JP (1) | JP5710955B2 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014132861A1 (ja) * | 2013-02-26 | 2014-09-04 | ピーエスフォー ルクスコ エスエイアールエル | 半導体チップ |
| JP2021149659A (ja) | 2020-03-19 | 2021-09-27 | キオクシア株式会社 | 半導体集積回路、メモリコントローラ、およびメモリシステム |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4027438B2 (ja) * | 1995-05-25 | 2007-12-26 | 三菱電機株式会社 | 半導体装置 |
| JP3667855B2 (ja) * | 1996-01-25 | 2005-07-06 | 株式会社ルネサステクノロジ | 半導体装置 |
| JP3996267B2 (ja) * | 1998-05-12 | 2007-10-24 | エルピーダメモリ株式会社 | 半導体記憶装置 |
| US6137316A (en) * | 1998-06-09 | 2000-10-24 | Siemens Aktiengesellschaft | Integrated circuit with improved off chip drivers |
| JP2001110184A (ja) * | 1999-10-14 | 2001-04-20 | Hitachi Ltd | 半導体装置 |
| JP3557523B2 (ja) * | 2000-09-20 | 2004-08-25 | 日本電信電話株式会社 | 半導体集積回路装置 |
| JP3969020B2 (ja) * | 2001-06-15 | 2007-08-29 | 株式会社デンソー | 半導体集積回路装置 |
| JP4236448B2 (ja) * | 2002-11-15 | 2009-03-11 | 三洋電機株式会社 | 半導体集積回路 |
| JP4353328B2 (ja) * | 2005-09-28 | 2009-10-28 | エルピーダメモリ株式会社 | 半導体パッケージの製造方法及び半導体パッケージ |
| JP2009283673A (ja) * | 2008-05-22 | 2009-12-03 | Elpida Memory Inc | 半導体装置 |
| JP2010086642A (ja) * | 2008-10-03 | 2010-04-15 | Nec Electronics Corp | 半導体装置および半導体装置の内部電源供給方法 |
| US8237541B2 (en) * | 2010-04-06 | 2012-08-07 | Chiu Sung Wang | Bottle cap with lock |
-
2010
- 2010-12-10 JP JP2010275370A patent/JP5710955B2/ja not_active Expired - Fee Related
-
2011
- 2011-12-09 US US13/315,553 patent/US20120146409A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US20120146409A1 (en) | 2012-06-14 |
| JP2012123881A (ja) | 2012-06-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100485547B1 (ko) | 다양한 패키지에 대응할 수 있는 반도체 기억 장치 | |
| JP4427847B2 (ja) | ダイナミック型ramと半導体装置 | |
| KR100452322B1 (ko) | 반도체 메모리 장치의 전원전압 공급 방법 및 셀 어레이전원전압 공급회로 | |
| CN113692621B (zh) | 用于控制字线放电的设备及方法 | |
| US8208324B2 (en) | Semiconductor memory device that can relief defective address | |
| US8116152B2 (en) | Nonvolatile semiconductor memory device capable of preventing write-disturb and method of programming | |
| JP2011113620A (ja) | 半導体装置及びこれを備えるデータ処理システム | |
| US20040114424A1 (en) | Semiconductor memory device | |
| US9824725B2 (en) | Semiconductor device with single ended main I/O line | |
| US10488914B2 (en) | Wiring with external terminal | |
| JP2015084266A (ja) | 半導体装置 | |
| JP4159454B2 (ja) | 半導体装置 | |
| JP2012190498A (ja) | 半導体装置及び情報処理システム | |
| US7180817B2 (en) | Semiconductor memory device with column selecting switches in hierarchical structure | |
| JP5710955B2 (ja) | 半導体装置 | |
| US20100195416A1 (en) | Anti-fuse circuit and semiconductor memory device | |
| CN111312311B (zh) | 用于减少写入上拉时间的设备和使用方法 | |
| US6859405B2 (en) | Semiconductor memory device having improved bit line sensing operation and method for driving power in a bit line sense amplifier of the semiconductor memory device | |
| JP2014120194A (ja) | 半導体装置 | |
| CN110998732A (zh) | 输入缓冲器电路 | |
| JP4949451B2 (ja) | ダイナミック型ramと半導体装置 | |
| JP2014146641A (ja) | 半導体装置 | |
| CN112309442B (zh) | 包含导电结构的设备和其布局 | |
| JP2015170376A (ja) | 半導体装置及びこれを備える情報処理システム | |
| US20200294561A1 (en) | Semiconductor devices |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120813 |
|
| A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20130730 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130822 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20131206 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20140414 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140513 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140807 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150203 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150305 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5710955 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| LAPS | Cancellation because of no payment of annual fees |