JP5661668B2 - 半導体ハウジングおよび半導体ハウジングの製造方法 - Google Patents
半導体ハウジングおよび半導体ハウジングの製造方法 Download PDFInfo
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Description
Claims (18)
- 金属支持体(90)と、
該金属支持体(90)上に配置された上側と下側のある半導体本体(80)であって、前記下側は前記金属支持体(90)と力伝達するように結合しており、前記上側に複数の金属面(50)を有し、該金属面(50)は、当該半導体本体(80)を電気接続するためにボンディングワイヤ(40)によってピン(60)と接続されている半導体本体(80)と、
前記ボンディングワイヤ(40)を完全に取り囲み、前記上側および前記ピン(60)を部分的に取り囲み、前記上側に開口部(20)を有するプラスチック部材(30)と、
前記上側に設けられたフレーム状またはリング状の壁(110)であって、該壁(110)は、上面と前記半導体本体の縁部から離間した基面とを有しており、該壁(110)の内寸は、前記上側にある前記開口部(20)の大きさによって決定される壁(110)と、
を有する半導体ハウジング(10)において、
前記上面上にはプレート(125)が形成されており、
該プレート(125)は、前記壁(110)の内部にある前記半導体本体(80)の表面を覆い、
該プレート(125)の縁部領域と前記壁(110)の外側とは、前記プラスチック部材(30)と形状的に結合しており、
前記上側の面で垂直ベクトル方向に、前記プラスチック部材(30)が前記開口部(20)の外の領域では前記壁(110)よりも大きな高さを有し、前記壁(110)の前記基面と前記上側との間に固定層(105)が形成されており、前記壁(110)は、前記開口部(20)内に形成されたセンサ面から離間しており、
前記壁(110)は、少なくとも1つの外側に、隣接する壁と接続するために用いられた1つの接続部(112)を有しており、
前記接続部(112)の端部は、前記半導体ハウジング(10)の外側で見える、
ことを特徴とする半導体ハウジング(10)。 - 前記固定層(105)は、周回する閉じたストライプとして構成されている、
請求項1に記載の半導体ハウジング(10)。 - 前記壁(110)は、金属により形成されており、前記金属は、銅を含有する、
請求項1または2に記載の半導体ハウジング(10)。 - 前記壁(110)は、矩形の断面を有し、少なくとも100μmの高さを有する、
請求項1から3のいずれか1項に記載の半導体ハウジング(10)。 - 前記壁(110)の外側は、前記半導体本体(80)の縁部から離間している、
請求項1から4のいずれか1項に記載の半導体ハウジング(10)。 - 前記プラスチック部材(30)と前記上面とは、壁段部を形成し、これにより前記上面の少なくとも一部が、前記プラスチック部材(30)により覆われていない、
請求項1から5のいずれか1項に記載の半導体ハウジング(10)。 - 前記上面と前記プレート(125)との間には、周回するストライプ状の接着層(115)が形成されている、
請求項1から6のいずれか1項に記載の半導体ハウジング(10)。 - 前記プレート(125)は、前記壁(110)の外側を越えて距離(d)だけ張り出している、
請求項1から7のいずれか1項に記載の半導体ハウジング(10)。 - 前記半導体本体(80)の表面の垂線に対する前記開口部(20)の角度は、0°以上である、
請求項1から8のいずれか1項に記載の半導体ハウジング(10)。 - 開口部(20)を有する半導体ハウジング(10)の製造方法であって、
1つのプロセスステップでウェハが半導体本体(80)に個別化され、
上側と下側のある前記半導体本体(80)の前記下側が、金属支持体(90)上に固定され、
前記半導体本体(80)が、ボンディングプロセスでボンディングワイヤ(40)を介してピン(60)と電気的に接続される製造方法において、
後続のプロセスステップで接続部(112)によって繋がっている多数のフレーム状の壁(110)から形成される格子構造体のフレーム状の壁が、モールドプロセス前に、前記半導体本体(80)の表面に固定され、
前記壁(110)の上面上にプレート(125)が形成され、
該プレート(125)は、前記壁(110)の内部にある前記半導体本体(80)の表面を覆い、
引き続くモールドプロセスで、表面を有するスタンプおよび当該スタンプの表面が少なくとも部分的に前記上面に押し付けられ、
引き続きプラスチック部材(30)が射出されて硬化され、これにより、前記プラスチック部材(30)が、前記ボンディングワイヤ(40)を完全に取り囲み、前記上側および前記ピン(60)を部分的に取り囲み、
前記プレート(125)の縁部領域と前記壁(110)の外側とは、前記プラスチック部材(30)と形状的に結合する、
ことを特徴とする製造方法。 - 前記モールドプロセスを実施する前に、前記上面の上にある接着層の上に前記プレート(125)が配置される、
請求項10に記載の方法。 - 前記壁(110)の全長にわたって前記上面の少なくとも一部または前記プレート(125)の少なくとも一部が、スタンプの表面の一部により形状的に結合して閉鎖される、
請求項11に記載の方法。 - 前記モールドプロセス中に、前記スタンプの表面が、前記上面または前記プレート(125)の表面を直接押圧する、
請求項10または11に項に記載の方法。 - 前記格子構造体を前記上面上に固定する前に、好ましくはテフロン(登録商標)を含む前記プレート(125)が配置される、
請求項10から13のいずれか1項に記載の方法。 - 前記モールドプロセス後に、隣接する前記壁(110)の間の前記接続部(112)が切断され、前記壁(110)が個別化される、
請求項10から14のいずれか1項に記載の方法。 - 前記接続部(112)の厚さが、前記壁(110)の高さより小さい、
請求項10から15のいずれか1項記載の方法。 - 前記壁(110)は、4つの外側に前記接続部(112)をそれぞれ1つ有している、請求項1記載の半導体ハウジング(10)。
- 前記壁(110)は、3つの外側に前記接続部(112)をそれぞれ1つ有している、
請求項1記載の半導体ハウジング(10)。
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DE102011013468A DE102011013468A1 (de) | 2011-03-09 | 2011-03-09 | Halbleitergehäuse und Verfahren zur Herstellung eines Halbleitergehäuses |
DE102011013468.9 | 2011-03-09 |
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JP2012191209A6 JP2012191209A6 (ja) | 2013-02-07 |
JP5661668B2 true JP5661668B2 (ja) | 2015-01-28 |
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US (2) | US8604599B2 (ja) |
EP (1) | EP2549529B1 (ja) |
JP (1) | JP5661668B2 (ja) |
KR (1) | KR101369688B1 (ja) |
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CN104495741B (zh) * | 2014-12-30 | 2018-05-01 | 华天科技(昆山)电子有限公司 | 表面传感芯片封装结构及制作方法 |
US9470652B1 (en) * | 2015-09-15 | 2016-10-18 | Freescale Semiconductor, Inc. | Sensing field effect transistor devices and method of their manufacture |
JP6565867B2 (ja) * | 2016-10-28 | 2019-08-28 | 株式会社デンソー | 空気物理量センサ |
US11302611B2 (en) * | 2018-11-28 | 2022-04-12 | Texas Instruments Incorporated | Semiconductor package with top circuit and an IC with a gap over the IC |
US11658083B2 (en) * | 2020-12-09 | 2023-05-23 | Texas Instruments Incorporated | Film covers for sensor packages |
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WO2006114005A1 (en) | 2005-04-27 | 2006-11-02 | Sensirion Ag | A method for packaging integrated sensors |
JP4450031B2 (ja) * | 2007-08-22 | 2010-04-14 | 株式会社デンソー | 半導体部品 |
DE102008003906B4 (de) | 2008-01-10 | 2009-11-26 | Rodenstock Gmbh | Verwendung eines Fixationstargets und Vorrichtung |
JP2009239106A (ja) * | 2008-03-27 | 2009-10-15 | Sony Corp | 半導体装置及び同半導体装置の製造方法 |
EP2154713B1 (en) * | 2008-08-11 | 2013-01-02 | Sensirion AG | Method for manufacturing a sensor device with a stress relief layer |
DE102009039068A1 (de) | 2009-08-27 | 2011-03-10 | Siemens Aktiengesellschaft | Vorrichtung zum Vereinzeln von flachen Gegenstände mittels zweier gespiegelt angeordneter Transportelemente |
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2011
- 2011-03-09 DE DE102011013468A patent/DE102011013468A1/de not_active Withdrawn
- 2011-12-29 EP EP11010292.8A patent/EP2549529B1/de active Active
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2012
- 2012-03-07 JP JP2012050854A patent/JP5661668B2/ja active Active
- 2012-03-08 KR KR1020120024069A patent/KR101369688B1/ko active IP Right Grant
- 2012-03-09 US US13/416,591 patent/US8604599B2/en active Active
- 2012-03-09 CN CN201210065544.7A patent/CN102683300B/zh active Active
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Publication number | Publication date |
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KR101369688B1 (ko) | 2014-03-04 |
KR20120103495A (ko) | 2012-09-19 |
US8822253B2 (en) | 2014-09-02 |
JP2012191209A (ja) | 2012-10-04 |
EP2549529B1 (de) | 2017-02-15 |
CN102683300B (zh) | 2015-05-20 |
US20120228756A1 (en) | 2012-09-13 |
CN102683300A (zh) | 2012-09-19 |
EP2549529A1 (de) | 2013-01-23 |
US20140057395A1 (en) | 2014-02-27 |
US8604599B2 (en) | 2013-12-10 |
DE102011013468A1 (de) | 2012-09-13 |
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