JP5661668B2 - 半導体ハウジングおよび半導体ハウジングの製造方法 - Google Patents
半導体ハウジングおよび半導体ハウジングの製造方法 Download PDFInfo
- Publication number
- JP5661668B2 JP5661668B2 JP2012050854A JP2012050854A JP5661668B2 JP 5661668 B2 JP5661668 B2 JP 5661668B2 JP 2012050854 A JP2012050854 A JP 2012050854A JP 2012050854 A JP2012050854 A JP 2012050854A JP 5661668 B2 JP5661668 B2 JP 5661668B2
- Authority
- JP
- Japan
- Prior art keywords
- wall
- semiconductor
- semiconductor body
- plate
- housing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 121
- 238000000034 method Methods 0.000 title claims description 52
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 239000004033 plastic Substances 0.000 claims description 36
- 239000002184 metal Substances 0.000 claims description 25
- 229910052751 metal Inorganic materials 0.000 claims description 25
- 238000000465 moulding Methods 0.000 claims description 24
- 239000010410 layer Substances 0.000 claims description 19
- 239000012790 adhesive layer Substances 0.000 claims description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 239000004809 Teflon Substances 0.000 claims description 2
- 229920006362 Teflon® Polymers 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 claims 1
- 239000011888 foil Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 230000007704 transition Effects 0.000 description 4
- 239000012778 molding material Substances 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000004873 anchoring Methods 0.000 description 2
- 238000005266 casting Methods 0.000 description 2
- 238000001125 extrusion Methods 0.000 description 2
- 238000007667 floating Methods 0.000 description 2
- 150000002736 metal compounds Chemical class 0.000 description 2
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Pressure Sensors (AREA)
- Measuring Fluid Pressure (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
Claims (18)
- 金属支持体(90)と、
該金属支持体(90)上に配置された上側と下側のある半導体本体(80)であって、前記下側は前記金属支持体(90)と力伝達するように結合しており、前記上側に複数の金属面(50)を有し、該金属面(50)は、当該半導体本体(80)を電気接続するためにボンディングワイヤ(40)によってピン(60)と接続されている半導体本体(80)と、
前記ボンディングワイヤ(40)を完全に取り囲み、前記上側および前記ピン(60)を部分的に取り囲み、前記上側に開口部(20)を有するプラスチック部材(30)と、
前記上側に設けられたフレーム状またはリング状の壁(110)であって、該壁(110)は、上面と前記半導体本体の縁部から離間した基面とを有しており、該壁(110)の内寸は、前記上側にある前記開口部(20)の大きさによって決定される壁(110)と、
を有する半導体ハウジング(10)において、
前記上面上にはプレート(125)が形成されており、
該プレート(125)は、前記壁(110)の内部にある前記半導体本体(80)の表面を覆い、
該プレート(125)の縁部領域と前記壁(110)の外側とは、前記プラスチック部材(30)と形状的に結合しており、
前記上側の面で垂直ベクトル方向に、前記プラスチック部材(30)が前記開口部(20)の外の領域では前記壁(110)よりも大きな高さを有し、前記壁(110)の前記基面と前記上側との間に固定層(105)が形成されており、前記壁(110)は、前記開口部(20)内に形成されたセンサ面から離間しており、
前記壁(110)は、少なくとも1つの外側に、隣接する壁と接続するために用いられた1つの接続部(112)を有しており、
前記接続部(112)の端部は、前記半導体ハウジング(10)の外側で見える、
ことを特徴とする半導体ハウジング(10)。 - 前記固定層(105)は、周回する閉じたストライプとして構成されている、
請求項1に記載の半導体ハウジング(10)。 - 前記壁(110)は、金属により形成されており、前記金属は、銅を含有する、
請求項1または2に記載の半導体ハウジング(10)。 - 前記壁(110)は、矩形の断面を有し、少なくとも100μmの高さを有する、
請求項1から3のいずれか1項に記載の半導体ハウジング(10)。 - 前記壁(110)の外側は、前記半導体本体(80)の縁部から離間している、
請求項1から4のいずれか1項に記載の半導体ハウジング(10)。 - 前記プラスチック部材(30)と前記上面とは、壁段部を形成し、これにより前記上面の少なくとも一部が、前記プラスチック部材(30)により覆われていない、
請求項1から5のいずれか1項に記載の半導体ハウジング(10)。 - 前記上面と前記プレート(125)との間には、周回するストライプ状の接着層(115)が形成されている、
請求項1から6のいずれか1項に記載の半導体ハウジング(10)。 - 前記プレート(125)は、前記壁(110)の外側を越えて距離(d)だけ張り出している、
請求項1から7のいずれか1項に記載の半導体ハウジング(10)。 - 前記半導体本体(80)の表面の垂線に対する前記開口部(20)の角度は、0°以上である、
請求項1から8のいずれか1項に記載の半導体ハウジング(10)。 - 開口部(20)を有する半導体ハウジング(10)の製造方法であって、
1つのプロセスステップでウェハが半導体本体(80)に個別化され、
上側と下側のある前記半導体本体(80)の前記下側が、金属支持体(90)上に固定され、
前記半導体本体(80)が、ボンディングプロセスでボンディングワイヤ(40)を介してピン(60)と電気的に接続される製造方法において、
後続のプロセスステップで接続部(112)によって繋がっている多数のフレーム状の壁(110)から形成される格子構造体のフレーム状の壁が、モールドプロセス前に、前記半導体本体(80)の表面に固定され、
前記壁(110)の上面上にプレート(125)が形成され、
該プレート(125)は、前記壁(110)の内部にある前記半導体本体(80)の表面を覆い、
引き続くモールドプロセスで、表面を有するスタンプおよび当該スタンプの表面が少なくとも部分的に前記上面に押し付けられ、
引き続きプラスチック部材(30)が射出されて硬化され、これにより、前記プラスチック部材(30)が、前記ボンディングワイヤ(40)を完全に取り囲み、前記上側および前記ピン(60)を部分的に取り囲み、
前記プレート(125)の縁部領域と前記壁(110)の外側とは、前記プラスチック部材(30)と形状的に結合する、
ことを特徴とする製造方法。 - 前記モールドプロセスを実施する前に、前記上面の上にある接着層の上に前記プレート(125)が配置される、
請求項10に記載の方法。 - 前記壁(110)の全長にわたって前記上面の少なくとも一部または前記プレート(125)の少なくとも一部が、スタンプの表面の一部により形状的に結合して閉鎖される、
請求項11に記載の方法。 - 前記モールドプロセス中に、前記スタンプの表面が、前記上面または前記プレート(125)の表面を直接押圧する、
請求項10または11に項に記載の方法。 - 前記格子構造体を前記上面上に固定する前に、好ましくはテフロン(登録商標)を含む前記プレート(125)が配置される、
請求項10から13のいずれか1項に記載の方法。 - 前記モールドプロセス後に、隣接する前記壁(110)の間の前記接続部(112)が切断され、前記壁(110)が個別化される、
請求項10から14のいずれか1項に記載の方法。 - 前記接続部(112)の厚さが、前記壁(110)の高さより小さい、
請求項10から15のいずれか1項記載の方法。 - 前記壁(110)は、4つの外側に前記接続部(112)をそれぞれ1つ有している、請求項1記載の半導体ハウジング(10)。
- 前記壁(110)は、3つの外側に前記接続部(112)をそれぞれ1つ有している、
請求項1記載の半導体ハウジング(10)。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102011013468.9 | 2011-03-09 | ||
DE102011013468A DE102011013468A1 (de) | 2011-03-09 | 2011-03-09 | Halbleitergehäuse und Verfahren zur Herstellung eines Halbleitergehäuses |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2012191209A JP2012191209A (ja) | 2012-10-04 |
JP2012191209A6 JP2012191209A6 (ja) | 2013-02-07 |
JP5661668B2 true JP5661668B2 (ja) | 2015-01-28 |
Family
ID=45464205
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012050854A Active JP5661668B2 (ja) | 2011-03-09 | 2012-03-07 | 半導体ハウジングおよび半導体ハウジングの製造方法 |
Country Status (6)
Country | Link |
---|---|
US (2) | US8604599B2 (ja) |
EP (1) | EP2549529B1 (ja) |
JP (1) | JP5661668B2 (ja) |
KR (1) | KR101369688B1 (ja) |
CN (1) | CN102683300B (ja) |
DE (1) | DE102011013468A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9443815B2 (en) * | 2014-02-21 | 2016-09-13 | Maxim Integrated Products, Inc. | Embedded die redistribution layers for active device |
DE202014103355U1 (de) * | 2014-07-22 | 2014-08-19 | Infineon Technologies Ag | Eine Vorrichtung und ein System zum Detektieren einer physikalischen Größe |
CN104495741B (zh) * | 2014-12-30 | 2018-05-01 | 华天科技(昆山)电子有限公司 | 表面传感芯片封装结构及制作方法 |
US9470652B1 (en) * | 2015-09-15 | 2016-10-18 | Freescale Semiconductor, Inc. | Sensing field effect transistor devices and method of their manufacture |
JP6565867B2 (ja) * | 2016-10-28 | 2019-08-28 | 株式会社デンソー | 空気物理量センサ |
US11302611B2 (en) * | 2018-11-28 | 2022-04-12 | Texas Instruments Incorporated | Semiconductor package with top circuit and an IC with a gap over the IC |
US11658083B2 (en) * | 2020-12-09 | 2023-05-23 | Texas Instruments Incorporated | Film covers for sensor packages |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL8501394A (nl) | 1985-05-14 | 1986-12-01 | Arbo Handel Ontwikkeling | Inrichting voor het met kunststof omhullen van elektronische componenten. |
JPH0724287B2 (ja) * | 1987-02-12 | 1995-03-15 | 三菱電機株式会社 | 光透過用窓を有する半導体装置とその製造方法 |
US5534725A (en) * | 1992-06-16 | 1996-07-09 | Goldstar Electron Co., Ltd. | Resin molded charge coupled device package and method for preparation thereof |
KR970005706B1 (ko) * | 1994-01-24 | 1997-04-19 | 금성일렉트론 주식회사 | 고체촬상소자 및 그 제조방법 |
US6401545B1 (en) * | 2000-01-25 | 2002-06-11 | Motorola, Inc. | Micro electro-mechanical system sensor with selective encapsulation and method therefor |
US6492699B1 (en) * | 2000-05-22 | 2002-12-10 | Amkor Technology, Inc. | Image sensor package having sealed cavity over active area |
FR2819634B1 (fr) * | 2001-01-15 | 2004-01-16 | St Microelectronics Sa | Boitier semi-conducteur a capteur, muni d'un insert et son procede de fabrication |
EP1246235A1 (en) * | 2001-03-26 | 2002-10-02 | European Semiconductor Assembly (Eurasem) B.V. | Method for encapsulating a chip having a sensitive surface |
NL1019042C2 (nl) * | 2001-09-26 | 2003-03-27 | Europ Semiconductor Assembly E | Werkwijze voor het inkapselen van een chip en/of ander voorwerp. |
US6995462B2 (en) * | 2003-09-17 | 2006-02-07 | Micron Technology, Inc. | Image sensor packages |
WO2006101274A1 (en) * | 2005-03-25 | 2006-09-28 | Fujifilm Corporation | Method of manufacturing solid state imaging device |
JP5095114B2 (ja) * | 2005-03-25 | 2012-12-12 | 富士フイルム株式会社 | 固体撮像装置の製造方法 |
WO2006114005A1 (en) | 2005-04-27 | 2006-11-02 | Sensirion Ag | A method for packaging integrated sensors |
JP4450031B2 (ja) * | 2007-08-22 | 2010-04-14 | 株式会社デンソー | 半導体部品 |
DE102008003906B4 (de) | 2008-01-10 | 2009-11-26 | Rodenstock Gmbh | Verwendung eines Fixationstargets und Vorrichtung |
JP2009239106A (ja) * | 2008-03-27 | 2009-10-15 | Sony Corp | 半導体装置及び同半導体装置の製造方法 |
EP2154713B1 (en) * | 2008-08-11 | 2013-01-02 | Sensirion AG | Method for manufacturing a sensor device with a stress relief layer |
DE102009039068A1 (de) | 2009-08-27 | 2011-03-10 | Siemens Aktiengesellschaft | Vorrichtung zum Vereinzeln von flachen Gegenstände mittels zweier gespiegelt angeordneter Transportelemente |
-
2011
- 2011-03-09 DE DE102011013468A patent/DE102011013468A1/de not_active Withdrawn
- 2011-12-29 EP EP11010292.8A patent/EP2549529B1/de active Active
-
2012
- 2012-03-07 JP JP2012050854A patent/JP5661668B2/ja active Active
- 2012-03-08 KR KR1020120024069A patent/KR101369688B1/ko active IP Right Grant
- 2012-03-09 US US13/416,591 patent/US8604599B2/en active Active
- 2012-03-09 CN CN201210065544.7A patent/CN102683300B/zh active Active
-
2013
- 2013-11-01 US US14/069,920 patent/US8822253B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2012191209A (ja) | 2012-10-04 |
US8822253B2 (en) | 2014-09-02 |
CN102683300B (zh) | 2015-05-20 |
KR101369688B1 (ko) | 2014-03-04 |
US8604599B2 (en) | 2013-12-10 |
EP2549529A1 (de) | 2013-01-23 |
US20140057395A1 (en) | 2014-02-27 |
US20120228756A1 (en) | 2012-09-13 |
EP2549529B1 (de) | 2017-02-15 |
DE102011013468A1 (de) | 2012-09-13 |
CN102683300A (zh) | 2012-09-19 |
KR20120103495A (ko) | 2012-09-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5661668B2 (ja) | 半導体ハウジングおよび半導体ハウジングの製造方法 | |
JP2012191209A6 (ja) | 半導体ハウジングおよび半導体ハウジングの製造方法 | |
US7727793B2 (en) | Physical quantity sensor and manufacturing method therefor | |
US10903172B2 (en) | Package with interlocking leads and manufacturing the same | |
TWI419832B (zh) | 微機電系統裝置及其之製造方法 | |
KR101297015B1 (ko) | 리드프레임을 이용한 팬-아웃 반도체 패키지 제조방법, 이에 의한 반도체 패키지 및 패키지 온 패키지 | |
US9643837B1 (en) | Sensor device and method for making thereof | |
CN101552251A (zh) | 半导体装置的引线框架和封装结构 | |
US9899290B2 (en) | Methods for manufacturing a packaged device with an extended structure for forming an opening in the encapsulant | |
US11040872B2 (en) | Semiconductor module | |
CN107619020B (zh) | 底部封装体暴露的裸片mems压力传感器集成电路封装体设计 | |
JP2007048994A (ja) | 半導体装置及びその製造方法 | |
US20110001208A1 (en) | Semiconductor device and semiconductor device manufacturing method | |
JP2006332685A (ja) | 固体撮像装置 | |
CN106328623A (zh) | 具有稳定的延伸引线的引线框封装体 | |
TWI729681B (zh) | 光學封裝結構 | |
US8912051B1 (en) | Method for controlling molding compound geometry around a semiconductor die | |
US9171786B1 (en) | Integrated circuit with recess for die attachment | |
US10600758B2 (en) | Semiconductor sensor package | |
TW200828459A (en) | Method of packaging micro sensor | |
JP2010187182A (ja) | 半導体装置及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130612 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130805 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20131101 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20131107 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20131204 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140714 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20141006 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20141016 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20141023 |
|
RD03 | Notification of appointment of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7423 Effective date: 20141029 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20141125 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20141203 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5661668 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |