JP5660313B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP5660313B2
JP5660313B2 JP2011024568A JP2011024568A JP5660313B2 JP 5660313 B2 JP5660313 B2 JP 5660313B2 JP 2011024568 A JP2011024568 A JP 2011024568A JP 2011024568 A JP2011024568 A JP 2011024568A JP 5660313 B2 JP5660313 B2 JP 5660313B2
Authority
JP
Japan
Prior art keywords
wirings
wiring
column
row
measured
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2011024568A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012164838A (ja
JP2012164838A5 (enExample
Inventor
哲 黛
哲 黛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2011024568A priority Critical patent/JP5660313B2/ja
Priority to TW101100848A priority patent/TW201234413A/zh
Priority to US13/358,084 priority patent/US20120199829A1/en
Priority to CN2012100214923A priority patent/CN102629602A/zh
Publication of JP2012164838A publication Critical patent/JP2012164838A/ja
Publication of JP2012164838A5 publication Critical patent/JP2012164838A5/ja
Application granted granted Critical
Publication of JP5660313B2 publication Critical patent/JP5660313B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Automation & Control Theory (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2011024568A 2011-02-08 2011-02-08 半導体装置 Expired - Fee Related JP5660313B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2011024568A JP5660313B2 (ja) 2011-02-08 2011-02-08 半導体装置
TW101100848A TW201234413A (en) 2011-02-08 2012-01-09 Semiconductor device
US13/358,084 US20120199829A1 (en) 2011-02-08 2012-01-25 Semiconductor device
CN2012100214923A CN102629602A (zh) 2011-02-08 2012-01-31 半导体器件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011024568A JP5660313B2 (ja) 2011-02-08 2011-02-08 半導体装置

Publications (3)

Publication Number Publication Date
JP2012164838A JP2012164838A (ja) 2012-08-30
JP2012164838A5 JP2012164838A5 (enExample) 2014-03-06
JP5660313B2 true JP5660313B2 (ja) 2015-01-28

Family

ID=46587826

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011024568A Expired - Fee Related JP5660313B2 (ja) 2011-02-08 2011-02-08 半導体装置

Country Status (4)

Country Link
US (1) US20120199829A1 (enExample)
JP (1) JP5660313B2 (enExample)
CN (1) CN102629602A (enExample)
TW (1) TW201234413A (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8816715B2 (en) * 2011-05-12 2014-08-26 Nanya Technology Corp. MOS test structure, method for forming MOS test structure and method for performing wafer acceptance test
KR102326562B1 (ko) * 2013-10-04 2021-11-16 에스케이하이닉스 주식회사 테스트부를 갖는 반도체 장치, 이를 포함하는 전자 장치 및 그 테스트 방법
US9378826B2 (en) * 2014-07-23 2016-06-28 Samsung Electronics Co., Ltd. Nonvolatile memory device, program method thereof, and storage device including the same
US9972571B1 (en) 2016-12-15 2018-05-15 Taiwan Semiconductor Manufacturing Co., Ltd. Logic cell structure and method
US10756114B2 (en) 2017-12-28 2020-08-25 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor circuit with metal structure and manufacturing method

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3763664B2 (ja) * 1998-04-08 2006-04-05 松下電器産業株式会社 テスト回路
US7030651B2 (en) * 2003-12-04 2006-04-18 Viciciv Technology Programmable structured arrays
DE102004060369A1 (de) * 2004-12-15 2006-06-29 Infineon Technologies Ag Halbleiterscheibe mit Teststruktur
US7489151B2 (en) * 2005-10-03 2009-02-10 Pdf Solutions, Inc. Layout for DUT arrays used in semiconductor wafer testing
JP4274576B2 (ja) * 2007-01-12 2009-06-10 エルピーダメモリ株式会社 半導体装置
KR101283537B1 (ko) * 2007-09-28 2013-07-15 삼성전자주식회사 고전압 측정 회로 및 이를 구비하는 비휘발성 메모리 장치
JP5174505B2 (ja) * 2008-03-27 2013-04-03 シャープ株式会社 不具合検出機能を備えた半導体装置
JP5142145B2 (ja) * 2008-03-27 2013-02-13 ルネサスエレクトロニクス株式会社 半導体装置の製造方法、半導体ウェハ、およびテスト方法
US8343781B2 (en) * 2010-09-21 2013-01-01 International Business Machines Corporation Electrical mask inspection

Also Published As

Publication number Publication date
CN102629602A (zh) 2012-08-08
JP2012164838A (ja) 2012-08-30
US20120199829A1 (en) 2012-08-09
TW201234413A (en) 2012-08-16

Similar Documents

Publication Publication Date Title
US8115500B2 (en) Accurate capacitance measurement for ultra large scale integrated circuits
TWI570586B (zh) 用於包括奈米線及２ｄ材料條之積體電路元件的設計工具
US20230207429A1 (en) Integrated circuit having contact jumper
US10147684B1 (en) Integrated circuit devices
US8125233B2 (en) Parametric testline with increased test pattern areas
TWI524445B (zh) Manufacturing method of semiconductor device
US8211716B2 (en) Manufacturing method of a semiconductor device, a semiconductor wafer, and a test method
JP5660313B2 (ja) 半導体装置
CN107464802B (zh) 集成电路和标准单元库
US11769726B2 (en) Semiconductor device
US20130173214A1 (en) Method and structure for inline electrical fin critical dimension measurement
TWI850480B (zh) 半導體裝置以及其製作方法
US12456663B2 (en) Integrated circuit having contact jumper
JP4970749B2 (ja) 容易に変更することができる配線構造体の設計方法
US8954916B2 (en) Test circuit, integrated circuit, and test circuit layout method
CN109841621A (zh) 具有高迁移率的集成电路元件以及形成集成电路元件的系统
JP2005032768A (ja) 半導体装置
US20100289112A1 (en) Method and apparatus of core timing prediction of core logic in the chip-level implementation process through an over-core window on a chip-level routing layer
US20250355021A1 (en) Test element group and using the same
US20230142050A1 (en) Integrated circuit and method of manufacturing the same
TW201841339A (zh) 具有接觸窗跳線件的積體電路及半導體裝置
US10777508B2 (en) Semiconductor device
JP2007129018A (ja) 半導体装置
JP2008028111A (ja) 半導体装置
Bhushan et al. Resistors

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140120

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20140120

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20140829

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140902

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20141016

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20141105

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20141118

LAPS Cancellation because of no payment of annual fees