JP5609085B2 - 半導体装置および半導体装置の製造方法 - Google Patents

半導体装置および半導体装置の製造方法 Download PDF

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Publication number
JP5609085B2
JP5609085B2 JP2009275861A JP2009275861A JP5609085B2 JP 5609085 B2 JP5609085 B2 JP 5609085B2 JP 2009275861 A JP2009275861 A JP 2009275861A JP 2009275861 A JP2009275861 A JP 2009275861A JP 5609085 B2 JP5609085 B2 JP 5609085B2
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Japan
Prior art keywords
semiconductor device
wiring layer
columnar conductors
substrate
columnar
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JP2009275861A
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English (en)
Japanese (ja)
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JP2011119481A (ja
JP2011119481A5 (enrdf_load_stackoverflow
Inventor
昌宏 春原
昌宏 春原
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2009275861A priority Critical patent/JP5609085B2/ja
Publication of JP2011119481A publication Critical patent/JP2011119481A/ja
Publication of JP2011119481A5 publication Critical patent/JP2011119481A5/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0655Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2009275861A 2009-12-03 2009-12-03 半導体装置および半導体装置の製造方法 Active JP5609085B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009275861A JP5609085B2 (ja) 2009-12-03 2009-12-03 半導体装置および半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009275861A JP5609085B2 (ja) 2009-12-03 2009-12-03 半導体装置および半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2011119481A JP2011119481A (ja) 2011-06-16
JP2011119481A5 JP2011119481A5 (enrdf_load_stackoverflow) 2012-12-13
JP5609085B2 true JP5609085B2 (ja) 2014-10-22

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8963339B2 (en) * 2012-10-08 2015-02-24 Qualcomm Incorporated Stacked multi-chip integrated circuit package
JP6112857B2 (ja) * 2012-12-25 2017-04-12 新光電気工業株式会社 配線基板及びその製造方法
JP6364762B2 (ja) * 2013-12-19 2018-08-01 富士通株式会社 電子デバイスの製造方法
WO2017026317A1 (ja) * 2015-08-10 2017-02-16 大日本印刷株式会社 イメージセンサモジュール
JP6191728B2 (ja) * 2015-08-10 2017-09-06 大日本印刷株式会社 イメージセンサモジュール

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002270721A (ja) * 2001-03-12 2002-09-20 Fujitsu Ltd 半導体装置及びその製造方法
JP2004071719A (ja) * 2002-08-02 2004-03-04 Sony Corp インターポーザおよびその製造方法、並びに電子回路装置およびその製造方法
JP2004079745A (ja) * 2002-08-16 2004-03-11 Sony Corp インターポーザおよびその製造方法、並びに電子回路装置およびその製造方法
JP2004281982A (ja) * 2003-03-19 2004-10-07 Seiko Epson Corp 半導体装置及びその製造方法
JP4863857B2 (ja) * 2006-12-11 2012-01-25 日本インター株式会社 半導体モジュールおよび半導体装置の製造方法
JP2009164262A (ja) * 2007-12-28 2009-07-23 Seiko Epson Corp 半導体装置および電子機器

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