JP5607399B2 - Soi基板の作製方法 - Google Patents
Soi基板の作製方法 Download PDFInfo
- Publication number
- JP5607399B2 JP5607399B2 JP2010066112A JP2010066112A JP5607399B2 JP 5607399 B2 JP5607399 B2 JP 5607399B2 JP 2010066112 A JP2010066112 A JP 2010066112A JP 2010066112 A JP2010066112 A JP 2010066112A JP 5607399 B2 JP5607399 B2 JP 5607399B2
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- layer
- crystal semiconductor
- single crystal
- substrate
- semiconductor substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
- H10D86/0223—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B13/00—Single-crystal growth by zone-melting; Refining by zone-melting
- C30B13/16—Heating of the molten zone
- C30B13/22—Heating of the molten zone by irradiation or electric discharge
- C30B13/24—Heating of the molten zone by irradiation or electric discharge using electromagnetic waves
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B31/00—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
- C30B31/20—Doping by irradiation with electromagnetic waves or by particle radiation
- C30B31/22—Doping by irradiation with electromagnetic waves or by particle radiation by ion-implantation
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/02—Heat treatment
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/06—Joining of crystals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
- H10D86/0223—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials
- H10D86/0227—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials using structural arrangements to control crystal growth, e.g. placement of grain filters
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Thermal Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010066112A JP5607399B2 (ja) | 2009-03-24 | 2010-03-23 | Soi基板の作製方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009071103 | 2009-03-24 | ||
| JP2009071103 | 2009-03-24 | ||
| JP2010066112A JP5607399B2 (ja) | 2009-03-24 | 2010-03-23 | Soi基板の作製方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010251725A JP2010251725A (ja) | 2010-11-04 |
| JP2010251725A5 JP2010251725A5 (enExample) | 2013-04-04 |
| JP5607399B2 true JP5607399B2 (ja) | 2014-10-15 |
Family
ID=42784784
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010066112A Expired - Fee Related JP5607399B2 (ja) | 2009-03-24 | 2010-03-23 | Soi基板の作製方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8048773B2 (enExample) |
| JP (1) | JP5607399B2 (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5819614B2 (ja) * | 2011-02-02 | 2015-11-24 | 信越化学工業株式会社 | Soiウェーハの製造方法 |
| FR2971885A1 (fr) | 2011-02-18 | 2012-08-24 | Commissariat Energie Atomique | Procédé de réalisation d'un support de substrat |
| JP6041885B2 (ja) * | 2011-10-14 | 2016-12-14 | スリーエム イノベイティブ プロパティズ カンパニー | 遠隔蛍光式led装置のためのレンズ組立体 |
| FR3007891B1 (fr) * | 2013-06-28 | 2016-11-25 | Soitec Silicon On Insulator | Procede de fabrication d'une structure composite |
| JP6096685B2 (ja) * | 2014-01-28 | 2017-03-15 | 日本電信電話株式会社 | 半導体装置の製造方法 |
| US9515181B2 (en) | 2014-08-06 | 2016-12-06 | Qualcomm Incorporated | Semiconductor device with self-aligned back side features |
| CN106153178A (zh) * | 2015-03-17 | 2016-11-23 | 中国科学院苏州纳米技术与纳米仿生研究所 | 柔性导电振膜、柔性振动传感器及其制备方法和应用 |
| CN109770866B (zh) * | 2018-12-11 | 2020-08-07 | 东北大学 | 一种高灵敏度电子皮肤的制备方法 |
Family Cites Families (35)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS575327A (en) * | 1980-06-13 | 1982-01-12 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
| JPS6046074B2 (ja) | 1981-06-30 | 1985-10-14 | 日本電信電話株式会社 | 半導体結晶成長方法 |
| JPS61260621A (ja) * | 1985-05-15 | 1986-11-18 | Matsushita Electric Ind Co Ltd | 非晶質シリコンもしくは多結晶シリコンの再処理方法 |
| JPS6276715A (ja) | 1985-09-30 | 1987-04-08 | Sony Corp | 単結晶シリコン薄膜の形成方法 |
| JP2743370B2 (ja) | 1988-03-30 | 1998-04-22 | 日産自動車株式会社 | 多結晶膜の形成方法 |
| JP2737152B2 (ja) | 1988-05-17 | 1998-04-08 | セイコーエプソン株式会社 | Soi形成方法 |
| JPH038797A (ja) | 1989-03-24 | 1991-01-16 | Hajime Ihara | ダイヤモンドの加圧気相合成法 |
| JP2766315B2 (ja) | 1989-06-08 | 1998-06-18 | キヤノン株式会社 | 半導体の製造法 |
| JPH0395922A (ja) | 1989-09-07 | 1991-04-22 | Canon Inc | 半導体薄膜の形成方法 |
| KR950014609B1 (ko) | 1990-08-03 | 1995-12-11 | 캐논 가부시끼가이샤 | 반도체부재 및 반도체부재의 제조방법 |
| FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| JPH08250421A (ja) | 1995-03-10 | 1996-09-27 | Canon Inc | 半導体基板の製造方法および半導体基板 |
| JP3675886B2 (ja) | 1995-03-17 | 2005-07-27 | 株式会社半導体エネルギー研究所 | 薄膜半導体デバイスの作製方法 |
| US6191007B1 (en) | 1997-04-28 | 2001-02-20 | Denso Corporation | Method for manufacturing a semiconductor substrate |
| US6251754B1 (en) | 1997-05-09 | 2001-06-26 | Denso Corporation | Semiconductor substrate manufacturing method |
| US6048411A (en) * | 1997-05-12 | 2000-04-11 | Silicon Genesis Corporation | Silicon-on-silicon hybrid wafer assembly |
| JPH1145862A (ja) | 1997-07-24 | 1999-02-16 | Denso Corp | 半導体基板の製造方法 |
| JPH11163363A (ja) | 1997-11-22 | 1999-06-18 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| JP2000012864A (ja) | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| JP2000124092A (ja) | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
| WO2001006546A2 (en) | 1999-07-16 | 2001-01-25 | Massachusetts Institute Of Technology | Silicon on iii-v semiconductor bonding for monolithic optoelectronic integration |
| AU6905000A (en) | 1999-08-10 | 2001-03-05 | Silicon Genesis Corporation | A cleaving process to fabricate multilayered substrates using low implantation doses |
| JP2003124230A (ja) | 2001-10-12 | 2003-04-25 | Hitachi Ltd | 薄膜トランジスタ装置、その製造方法及びこの装置を用いた画像表示装置 |
| JP4103447B2 (ja) * | 2002-04-30 | 2008-06-18 | 株式会社Ihi | 大面積単結晶シリコン基板の製造方法 |
| US7399681B2 (en) * | 2003-02-18 | 2008-07-15 | Corning Incorporated | Glass-based SOI structures |
| KR100578787B1 (ko) * | 2004-06-12 | 2006-05-11 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| JP2006270775A (ja) * | 2005-03-25 | 2006-10-05 | Matsushita Electric Works Ltd | インターホンシステム |
| EP1835533B1 (en) | 2006-03-14 | 2020-06-03 | Soitec | Method for manufacturing compound material wafers and method for recycling a used donor substrate |
| EP1975998A3 (en) | 2007-03-26 | 2013-12-04 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a plurality of island-shaped SOI structures |
| CN101657882B (zh) * | 2007-04-13 | 2012-05-30 | 株式会社半导体能源研究所 | 显示器件、用于制造显示器件的方法、以及soi衬底 |
| KR101443580B1 (ko) * | 2007-05-11 | 2014-10-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Soi구조를 갖는 기판 |
| CN101743616B (zh) * | 2007-06-28 | 2012-02-22 | 株式会社半导体能源研究所 | 半导体装置的制造方法 |
| US7795114B2 (en) | 2007-08-10 | 2010-09-14 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing methods of SOI substrate and semiconductor device |
| US7781308B2 (en) | 2007-12-03 | 2010-08-24 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| FR2942674B1 (fr) * | 2009-02-27 | 2011-12-16 | Commissariat Energie Atomique | Procede d'elaboration d'un substrat hybride par recristallisation partielle d'une couche mixte |
-
2010
- 2010-03-23 US US12/729,983 patent/US8048773B2/en not_active Expired - Fee Related
- 2010-03-23 JP JP2010066112A patent/JP5607399B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US8048773B2 (en) | 2011-11-01 |
| JP2010251725A (ja) | 2010-11-04 |
| US20100248444A1 (en) | 2010-09-30 |
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