JP5588620B2 - ウェーハ・レベル・パッケージ及びその形成方法 - Google Patents

ウェーハ・レベル・パッケージ及びその形成方法 Download PDF

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Publication number
JP5588620B2
JP5588620B2 JP2009081073A JP2009081073A JP5588620B2 JP 5588620 B2 JP5588620 B2 JP 5588620B2 JP 2009081073 A JP2009081073 A JP 2009081073A JP 2009081073 A JP2009081073 A JP 2009081073A JP 5588620 B2 JP5588620 B2 JP 5588620B2
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Japan
Prior art keywords
polymer
wafer level
laminate layer
level package
polymer laminate
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Active
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JP2009081073A
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English (en)
Japanese (ja)
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JP2009246367A (ja
JP2009246367A5 (enExample
Inventor
クリストファー・ジェームズ・カプスタ
ドナルド・カニングハム
リチャード・ジョセフ・サイア
ケビン・ドゥローシャー
ジョセフ・イアノッティ
ウィリアム・ホーキンス
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General Electric Co
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General Electric Co
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Publication of JP2009246367A publication Critical patent/JP2009246367A/ja
Publication of JP2009246367A5 publication Critical patent/JP2009246367A5/ja
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Publication of JP5588620B2 publication Critical patent/JP5588620B2/ja
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    • H10W74/129—
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/007—Interconnections between the MEMS and external electrical signals
    • H10W20/49—
    • H10W20/496—
    • H10W20/498—
    • H10W72/20—
    • H10W70/05—
    • H10W72/01225—
    • H10W72/244—
    • H10W72/251—
    • H10W72/252—
    • H10W72/29—
    • H10W72/922—

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2009081073A 2008-03-31 2009-03-30 ウェーハ・レベル・パッケージ及びその形成方法 Active JP5588620B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/059,075 2008-03-31
US12/059,075 US7952187B2 (en) 2008-03-31 2008-03-31 System and method of forming a wafer scale package

Publications (3)

Publication Number Publication Date
JP2009246367A JP2009246367A (ja) 2009-10-22
JP2009246367A5 JP2009246367A5 (enExample) 2012-05-17
JP5588620B2 true JP5588620B2 (ja) 2014-09-10

Family

ID=40809871

Family Applications (1)

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JP2009081073A Active JP5588620B2 (ja) 2008-03-31 2009-03-30 ウェーハ・レベル・パッケージ及びその形成方法

Country Status (5)

Country Link
US (1) US7952187B2 (enExample)
EP (1) EP2107599B1 (enExample)
JP (1) JP5588620B2 (enExample)
KR (1) KR101568043B1 (enExample)
TW (1) TWI492318B (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8114708B2 (en) * 2008-09-30 2012-02-14 General Electric Company System and method for pre-patterned embedded chip build-up
US10276486B2 (en) 2010-03-02 2019-04-30 General Electric Company Stress resistant micro-via structure for flexible circuits
TWI421957B (zh) * 2010-08-04 2014-01-01 環旭電子股份有限公司 系統封裝模組的製造方法及其封裝結構
US8829676B2 (en) * 2011-06-28 2014-09-09 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure for wafer level package
US8824161B2 (en) 2012-06-15 2014-09-02 Medtronic, Inc. Integrated circuit packaging for implantable medical devices
US9368460B2 (en) 2013-03-15 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Fan-out interconnect structure and method for forming same
US9484318B2 (en) * 2014-02-17 2016-11-01 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
EP3169624B1 (en) * 2014-07-18 2023-09-06 The Regents of The University of California Device for gas maintenance in microfeatures on a submerged surface
US10432168B2 (en) 2015-08-31 2019-10-01 General Electric Company Systems and methods for quartz wafer bonding
US10333493B2 (en) * 2016-08-25 2019-06-25 General Electric Company Embedded RF filter package structure and method of manufacturing thereof
KR102385549B1 (ko) 2017-08-16 2022-04-12 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법
US20190206786A1 (en) * 2017-12-28 2019-07-04 Intel Corporation Thin film passive devices integrated in a package substrate

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5366906A (en) * 1992-10-16 1994-11-22 Martin Marietta Corporation Wafer level integration and testing
US5561085A (en) * 1994-12-19 1996-10-01 Martin Marietta Corporation Structure for protecting air bridges on semiconductor chips from damage
DE69635397T2 (de) * 1995-03-24 2006-05-24 Shinko Electric Industries Co., Ltd. Halbleitervorrichtung mit Chipabmessungen und Herstellungsverfahren
US6773962B2 (en) * 2001-03-15 2004-08-10 General Electric Company Microelectromechanical system device packaging method
US6673698B1 (en) * 2002-01-19 2004-01-06 Megic Corporation Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers
JP3951788B2 (ja) * 2002-04-25 2007-08-01 株式会社デンソー 表面実装型電子部品
JP3972246B2 (ja) * 2003-01-07 2007-09-05 ソニー株式会社 ウエハーレベル・チップサイズ・パッケージおよびその製造方法
JP4285079B2 (ja) * 2003-05-22 2009-06-24 カシオ計算機株式会社 半導体装置の製造方法
KR100609011B1 (ko) * 2003-12-05 2006-08-03 삼성전자주식회사 웨이퍼 레벨 모듈 및 그의 제조 방법
JP2005268297A (ja) * 2004-03-16 2005-09-29 Hitachi Media Electoronics Co Ltd 高周波デバイスおよびその製造方法
US7189594B2 (en) * 2004-09-10 2007-03-13 Agency For Science, Technology And Research Wafer level packages and methods of fabrication
JP3976043B2 (ja) * 2004-10-25 2007-09-12 セイコーエプソン株式会社 半導体装置及びその製造方法
JP4774248B2 (ja) * 2005-07-22 2011-09-14 Ｏｋｉセミコンダクタ株式会社 半導体装置
JP4193897B2 (ja) * 2006-05-19 2008-12-10 カシオ計算機株式会社 半導体装置およびその製造方法
DE102006032431B4 (de) * 2006-06-22 2011-12-01 Siltronic Ag Verfahren und Vorrichtung zur Detektion von mechanischen Defekten in einem aus Halbleitermaterial bestehenden Stabstück
US7626269B2 (en) * 2006-07-06 2009-12-01 Micron Technology, Inc. Semiconductor constructions and assemblies, and electronic systems
JP4679553B2 (ja) * 2007-07-23 2011-04-27 イビデン株式会社 半導体チップ

Also Published As

Publication number Publication date
JP2009246367A (ja) 2009-10-22
EP2107599A3 (en) 2012-11-21
KR20090104744A (ko) 2009-10-06
EP2107599B1 (en) 2019-07-03
TWI492318B (zh) 2015-07-11
KR101568043B1 (ko) 2015-11-10
US20090243081A1 (en) 2009-10-01
TW201001577A (en) 2010-01-01
US7952187B2 (en) 2011-05-31
EP2107599A2 (en) 2009-10-07

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