JP5573851B2 - 部品内蔵基板の製造方法 - Google Patents
部品内蔵基板の製造方法 Download PDFInfo
- Publication number
- JP5573851B2 JP5573851B2 JP2011551761A JP2011551761A JP5573851B2 JP 5573851 B2 JP5573851 B2 JP 5573851B2 JP 2011551761 A JP2011551761 A JP 2011551761A JP 2011551761 A JP2011551761 A JP 2011551761A JP 5573851 B2 JP5573851 B2 JP 5573851B2
- Authority
- JP
- Japan
- Prior art keywords
- component
- resin layer
- wiring
- bonding material
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09118—Moulded substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/0415—Small preforms other than balls, e.g. discs, cylinders or pillars
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011551761A JP5573851B2 (ja) | 2010-01-26 | 2011-01-26 | 部品内蔵基板の製造方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010014359 | 2010-01-26 | ||
JP2010014359 | 2010-01-26 | ||
PCT/JP2011/000410 WO2011093068A1 (fr) | 2010-01-26 | 2011-01-26 | Procédé de production d'un substrat comportant des composants intégrés, et substrat comportant des composants intégrés |
JP2011551761A JP5573851B2 (ja) | 2010-01-26 | 2011-01-26 | 部品内蔵基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2011093068A1 JPWO2011093068A1 (ja) | 2013-05-30 |
JP5573851B2 true JP5573851B2 (ja) | 2014-08-20 |
Family
ID=44319064
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011551761A Expired - Fee Related JP5573851B2 (ja) | 2010-01-26 | 2011-01-26 | 部品内蔵基板の製造方法 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP5573851B2 (fr) |
WO (1) | WO2011093068A1 (fr) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003204167A (ja) * | 2001-10-26 | 2003-07-18 | Matsushita Electric Works Ltd | 配線板用シート材及びその製造方法、並びに多層板及びその製造方法 |
JP2004055967A (ja) * | 2002-07-23 | 2004-02-19 | Matsushita Electric Ind Co Ltd | 電子部品内蔵基板の製造方法 |
JP2004193392A (ja) * | 2002-12-12 | 2004-07-08 | Matsushita Electric Ind Co Ltd | 回路部品内蔵モジュールおよびその製造方法 |
JP2009267149A (ja) * | 2008-04-25 | 2009-11-12 | Dainippon Printing Co Ltd | 部品内蔵配線板、部品内蔵配線板の製造方法 |
-
2011
- 2011-01-26 WO PCT/JP2011/000410 patent/WO2011093068A1/fr active Application Filing
- 2011-01-26 JP JP2011551761A patent/JP5573851B2/ja not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003204167A (ja) * | 2001-10-26 | 2003-07-18 | Matsushita Electric Works Ltd | 配線板用シート材及びその製造方法、並びに多層板及びその製造方法 |
JP2004055967A (ja) * | 2002-07-23 | 2004-02-19 | Matsushita Electric Ind Co Ltd | 電子部品内蔵基板の製造方法 |
JP2004193392A (ja) * | 2002-12-12 | 2004-07-08 | Matsushita Electric Ind Co Ltd | 回路部品内蔵モジュールおよびその製造方法 |
JP2009267149A (ja) * | 2008-04-25 | 2009-11-12 | Dainippon Printing Co Ltd | 部品内蔵配線板、部品内蔵配線板の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
WO2011093068A1 (fr) | 2011-08-04 |
JPWO2011093068A1 (ja) | 2013-05-30 |
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