JP5573851B2 - 部品内蔵基板の製造方法 - Google Patents

部品内蔵基板の製造方法 Download PDF

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Publication number
JP5573851B2
JP5573851B2 JP2011551761A JP2011551761A JP5573851B2 JP 5573851 B2 JP5573851 B2 JP 5573851B2 JP 2011551761 A JP2011551761 A JP 2011551761A JP 2011551761 A JP2011551761 A JP 2011551761A JP 5573851 B2 JP5573851 B2 JP 5573851B2
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JP
Japan
Prior art keywords
component
resin layer
wiring
bonding material
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2011551761A
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English (en)
Japanese (ja)
Other versions
JPWO2011093068A1 (ja
Inventor
悟志 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2011551761A priority Critical patent/JP5573851B2/ja
Publication of JPWO2011093068A1 publication Critical patent/JPWO2011093068A1/ja
Application granted granted Critical
Publication of JP5573851B2 publication Critical patent/JP5573851B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09118Moulded substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/0415Small preforms other than balls, e.g. discs, cylinders or pillars

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2011551761A 2010-01-26 2011-01-26 部品内蔵基板の製造方法 Expired - Fee Related JP5573851B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011551761A JP5573851B2 (ja) 2010-01-26 2011-01-26 部品内蔵基板の製造方法

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2010014359 2010-01-26
JP2010014359 2010-01-26
PCT/JP2011/000410 WO2011093068A1 (fr) 2010-01-26 2011-01-26 Procédé de production d'un substrat comportant des composants intégrés, et substrat comportant des composants intégrés
JP2011551761A JP5573851B2 (ja) 2010-01-26 2011-01-26 部品内蔵基板の製造方法

Publications (2)

Publication Number Publication Date
JPWO2011093068A1 JPWO2011093068A1 (ja) 2013-05-30
JP5573851B2 true JP5573851B2 (ja) 2014-08-20

Family

ID=44319064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011551761A Expired - Fee Related JP5573851B2 (ja) 2010-01-26 2011-01-26 部品内蔵基板の製造方法

Country Status (2)

Country Link
JP (1) JP5573851B2 (fr)
WO (1) WO2011093068A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003204167A (ja) * 2001-10-26 2003-07-18 Matsushita Electric Works Ltd 配線板用シート材及びその製造方法、並びに多層板及びその製造方法
JP2004055967A (ja) * 2002-07-23 2004-02-19 Matsushita Electric Ind Co Ltd 電子部品内蔵基板の製造方法
JP2004193392A (ja) * 2002-12-12 2004-07-08 Matsushita Electric Ind Co Ltd 回路部品内蔵モジュールおよびその製造方法
JP2009267149A (ja) * 2008-04-25 2009-11-12 Dainippon Printing Co Ltd 部品内蔵配線板、部品内蔵配線板の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003204167A (ja) * 2001-10-26 2003-07-18 Matsushita Electric Works Ltd 配線板用シート材及びその製造方法、並びに多層板及びその製造方法
JP2004055967A (ja) * 2002-07-23 2004-02-19 Matsushita Electric Ind Co Ltd 電子部品内蔵基板の製造方法
JP2004193392A (ja) * 2002-12-12 2004-07-08 Matsushita Electric Ind Co Ltd 回路部品内蔵モジュールおよびその製造方法
JP2009267149A (ja) * 2008-04-25 2009-11-12 Dainippon Printing Co Ltd 部品内蔵配線板、部品内蔵配線板の製造方法

Also Published As

Publication number Publication date
WO2011093068A1 (fr) 2011-08-04
JPWO2011093068A1 (ja) 2013-05-30

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