JP5538697B2 - 半導体装置のテスト方法 - Google Patents

半導体装置のテスト方法 Download PDF

Info

Publication number
JP5538697B2
JP5538697B2 JP2008231892A JP2008231892A JP5538697B2 JP 5538697 B2 JP5538697 B2 JP 5538697B2 JP 2008231892 A JP2008231892 A JP 2008231892A JP 2008231892 A JP2008231892 A JP 2008231892A JP 5538697 B2 JP5538697 B2 JP 5538697B2
Authority
JP
Japan
Prior art keywords
burn
semiconductor device
board
socket
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008231892A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010066091A5 (enExample
JP2010066091A (ja
Inventor
彰 清藤
朋洋 西水
浩治 佐藤
繁 高田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2008231892A priority Critical patent/JP5538697B2/ja
Publication of JP2010066091A publication Critical patent/JP2010066091A/ja
Publication of JP2010066091A5 publication Critical patent/JP2010066091A5/ja
Application granted granted Critical
Publication of JP5538697B2 publication Critical patent/JP5538697B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
JP2008231892A 2008-09-10 2008-09-10 半導体装置のテスト方法 Expired - Fee Related JP5538697B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008231892A JP5538697B2 (ja) 2008-09-10 2008-09-10 半導体装置のテスト方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008231892A JP5538697B2 (ja) 2008-09-10 2008-09-10 半導体装置のテスト方法

Publications (3)

Publication Number Publication Date
JP2010066091A JP2010066091A (ja) 2010-03-25
JP2010066091A5 JP2010066091A5 (enExample) 2011-10-27
JP5538697B2 true JP5538697B2 (ja) 2014-07-02

Family

ID=42191802

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008231892A Expired - Fee Related JP5538697B2 (ja) 2008-09-10 2008-09-10 半導体装置のテスト方法

Country Status (1)

Country Link
JP (1) JP5538697B2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7800382B2 (en) 2007-12-19 2010-09-21 AEHR Test Ststems System for testing an integrated circuit of a device and its method of use
US8030957B2 (en) 2009-03-25 2011-10-04 Aehr Test Systems System for testing an integrated circuit of a device and its method of use
JP7045995B2 (ja) 2016-01-08 2022-04-01 エイアー テスト システムズ 電子試験装置における装置の熱制御のための方法及びシステム
KR20250124891A (ko) 2017-03-03 2025-08-20 에어 테스트 시스템즈 카트리지, 테스트 피스 및 하나 이상의 전자 디바이스들을 테스팅하는 방법
JP6961632B2 (ja) * 2019-01-21 2021-11-05 株式会社アドバンテスト バーンインボード及びバーンイン装置
CN116457670A (zh) 2020-10-07 2023-07-18 雅赫测试系统公司 电子测试器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06317630A (ja) * 1993-05-06 1994-11-15 Mitsubishi Electric Corp 半導体恒温加速試験装置用基板
JPH11102756A (ja) * 1997-09-25 1999-04-13 Nippon Avionics Co Ltd Ｉｃソケットの取付装置
JP2003084030A (ja) * 2001-09-14 2003-03-19 Hitachi Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
JP2010066091A (ja) 2010-03-25

Similar Documents

Publication Publication Date Title
EP2005470B1 (en) Lead frame based, over-molded semiconductor package with integrated through hole technology (tht) heat spreader pin(s) and associated method of manufacturing
JP5538697B2 (ja) 半導体装置のテスト方法
US20140291825A1 (en) Semiconductor device and semiconductor module
JPH0774282A (ja) 半導体装置
US20070284715A1 (en) System-in-package device
US20120306064A1 (en) Chip package
US8198725B2 (en) Heat sink and integrated circuit assembly using the same
CN107978582B (zh) 芯片封装结构及相关引脚接合方法
CN107039368A (zh) 树脂密封型半导体装置
US9006881B2 (en) Semiconductor device
CN102315135A (zh) 芯片封装及其制作工艺
TWI474451B (zh) 覆晶封裝結構及其形成方法
CN206059373U (zh) 半导体器件和电子装置
JP2010108955A (ja) 半導体装置およびその製造方法
JP2020112398A (ja) 半導体装置の製造方法およびソケット
US20140240949A1 (en) Substrate strip
JP3842272B2 (ja) インターポーザー、半導体チップマウントサブ基板および半導体パッケージ
US9892985B2 (en) Semiconductor device and method for manufacturing the same
US8729632B2 (en) Semiconductor structure with low resistance of substrate and low power consumption
JP4388926B2 (ja) 半導体装置のパッケージ構造
JP5119092B2 (ja) 半導体装置の製造方法
US12339313B2 (en) Electrical testing method for semiconductor device
JP4555187B2 (ja) パワーモジュールおよびその製造方法
JP2007141611A (ja) 測定用ソケットおよび半導体装置の製造方法
US20190131197A1 (en) Quad flat no-lead package

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20100527

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110902

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20110902

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20121004

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20121011

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121031

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130718

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130729

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140424

R150 Certificate of patent or registration of utility model

Ref document number: 5538697

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140430

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees