JP5520492B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP5520492B2
JP5520492B2 JP2009018245A JP2009018245A JP5520492B2 JP 5520492 B2 JP5520492 B2 JP 5520492B2 JP 2009018245 A JP2009018245 A JP 2009018245A JP 2009018245 A JP2009018245 A JP 2009018245A JP 5520492 B2 JP5520492 B2 JP 5520492B2
Authority
JP
Japan
Prior art keywords
region
film
semiconductor device
gate electrode
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009018245A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009212499A5 (enExample
JP2009212499A (ja
Inventor
康一郎 鎌田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2009018245A priority Critical patent/JP5520492B2/ja
Publication of JP2009212499A publication Critical patent/JP2009212499A/ja
Publication of JP2009212499A5 publication Critical patent/JP2009212499A5/ja
Application granted granted Critical
Publication of JP5520492B2 publication Critical patent/JP5520492B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G06K19/07775—Antenna details the antenna being on-chip
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G06K19/07777—Antenna details the antenna being of the inductive type
    • G06K19/07779—Antenna details the antenna being of the inductive type the inductive antenna being a coil
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6719—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions having significant overlap between the lightly-doped drains and the gate electrodes, e.g. gate-overlapped LDD [GOLDD] TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Thin Film Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2009018245A 2008-02-07 2009-01-29 半導体装置 Expired - Fee Related JP5520492B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009018245A JP5520492B2 (ja) 2008-02-07 2009-01-29 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008027140 2008-02-07
JP2008027140 2008-02-07
JP2009018245A JP5520492B2 (ja) 2008-02-07 2009-01-29 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2014077483A Division JP5847873B2 (ja) 2008-02-07 2014-04-04 半導体装置

Publications (3)

Publication Number Publication Date
JP2009212499A JP2009212499A (ja) 2009-09-17
JP2009212499A5 JP2009212499A5 (enExample) 2012-03-01
JP5520492B2 true JP5520492B2 (ja) 2014-06-11

Family

ID=40938140

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2009018245A Expired - Fee Related JP5520492B2 (ja) 2008-02-07 2009-01-29 半導体装置
JP2014077483A Expired - Fee Related JP5847873B2 (ja) 2008-02-07 2014-04-04 半導体装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2014077483A Expired - Fee Related JP5847873B2 (ja) 2008-02-07 2014-04-04 半導体装置

Country Status (3)

Country Link
US (1) US7923733B2 (enExample)
JP (2) JP5520492B2 (enExample)
KR (1) KR101591950B1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8284557B2 (en) * 2007-10-18 2012-10-09 Kyocera Corporation Circuit board, mounting structure, and method for manufacturing circuit board
WO2011108374A1 (en) * 2010-03-05 2011-09-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
US8928466B2 (en) * 2010-08-04 2015-01-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5863399B2 (ja) * 2011-11-07 2016-02-16 三菱電機株式会社 配線構造及びそれを備える薄膜トランジスタアレイ基板並びに表示装置
JP2014109453A (ja) * 2012-11-30 2014-06-12 Renesas Electronics Corp 半導体装置
US10685983B2 (en) 2016-11-11 2020-06-16 Semiconductor Energy Laboratory Co., Ltd. Transistor, semiconductor device, and electronic device
JP2021132208A (ja) * 2020-02-19 2021-09-09 東レ株式会社 半導体装置およびその製造方法、ならびに無線通信装置
JP7861853B2 (ja) * 2022-08-19 2026-05-19 Ｎｔｔ株式会社 整流器

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04127537A (ja) * 1990-09-19 1992-04-28 Nec Corp Ｍｏｓｆｅｔの製造方法
JP3203831B2 (ja) * 1992-10-23 2001-08-27 ソニー株式会社 静電破壊保護トランジスタ
US6512271B1 (en) * 1998-11-16 2003-01-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US6531713B1 (en) * 1999-03-19 2003-03-11 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and manufacturing method thereof
US6222236B1 (en) * 1999-04-30 2001-04-24 Motorola, Inc. Protection circuit and method for protecting a semiconductor device
JP3544499B2 (ja) * 1999-10-04 2004-07-21 セイコーインスツルメンツ株式会社 半導体集積回路装置
JP3688548B2 (ja) * 2000-03-14 2005-08-31 シャープ株式会社 画像表示装置
JP2002083974A (ja) * 2000-06-19 2002-03-22 Semiconductor Energy Lab Co Ltd 半導体装置
JP2002152080A (ja) 2000-11-08 2002-05-24 Hitachi Ltd タグ及びそれに用いる半導体集積回路
JP2005019636A (ja) * 2003-06-25 2005-01-20 Toshiba Matsushita Display Technology Co Ltd 薄膜ダイオード及び薄膜トランジスタ
JP4574158B2 (ja) * 2003-10-28 2010-11-04 株式会社半導体エネルギー研究所 半導体表示装置及びその作製方法
JP2006173538A (ja) * 2004-12-20 2006-06-29 Oki Electric Ind Co Ltd 半導体装置
US7588970B2 (en) * 2005-06-10 2009-09-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP2007036216A (ja) * 2005-06-24 2007-02-08 Semiconductor Energy Lab Co Ltd 半導体装置及び無線通信システム
EP1905073A4 (en) 2005-06-24 2011-05-11 Semiconductor Energy Lab SEMICONDUCTOR DEVICE AND WIRELESS COMMUNICATION SYSTEM
JP2007096211A (ja) * 2005-09-30 2007-04-12 Ricoh Co Ltd 半導体装置
EP1895545B1 (en) * 2006-08-31 2014-04-23 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device

Also Published As

Publication number Publication date
KR20090086311A (ko) 2009-08-12
JP2014160842A (ja) 2014-09-04
US20090200557A1 (en) 2009-08-13
JP5847873B2 (ja) 2016-01-27
US7923733B2 (en) 2011-04-12
KR101591950B1 (ko) 2016-02-04
JP2009212499A (ja) 2009-09-17

Similar Documents

Publication Publication Date Title
JP5847873B2 (ja) 半導体装置
JP5189429B2 (ja) 半導体装置及びその作製方法
US7906847B2 (en) Semiconductor device
KR101098777B1 (ko) Ｉｄ 칩 및 ｉｃ 카드
TWI430180B (zh) 半導體裝置
US8609464B2 (en) Method for shielding semiconductor device
JP5670118B2 (ja) 端子構造および電子装置
TWI452675B (zh) 半導體裝置和其製造方法
WO2005076359A1 (en) Semiconductor device
TW201013894A (en) Semiconductor device and method for manufacturing the same
US8957423B2 (en) Semiconductor device
JP5144313B2 (ja) 半導体装置
US20070004178A1 (en) Manufacturing method of semiconductor device
JP5159178B2 (ja) 半導体装置
HK1127934A (en) Semiconductor device and method for manufacturing the same

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20111129

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20111129

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120113

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120113

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130822

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130917

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140401

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140407

R150 Certificate of patent or registration of utility model

Ref document number: 5520492

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees