JP5495779B2 - 送信装置および通信システム - Google Patents

送信装置および通信システム Download PDF

Info

Publication number
JP5495779B2
JP5495779B2 JP2009297376A JP2009297376A JP5495779B2 JP 5495779 B2 JP5495779 B2 JP 5495779B2 JP 2009297376 A JP2009297376 A JP 2009297376A JP 2009297376 A JP2009297376 A JP 2009297376A JP 5495779 B2 JP5495779 B2 JP 5495779B2
Authority
JP
Japan
Prior art keywords
clock
data signal
serial data
parallel
serial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009297376A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011139246A5 (enExample
JP2011139246A (ja
Inventor
善一 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2009297376A priority Critical patent/JP5495779B2/ja
Priority to US12/961,842 priority patent/US8891665B2/en
Publication of JP2011139246A publication Critical patent/JP2011139246A/ja
Publication of JP2011139246A5 publication Critical patent/JP2011139246A5/ja
Application granted granted Critical
Publication of JP5495779B2 publication Critical patent/JP5495779B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00Parallel/series conversion or vice versa
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0272Arrangements for coupling to multiple lines, e.g. for differential transmission

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP2009297376A 2009-12-28 2009-12-28 送信装置および通信システム Expired - Fee Related JP5495779B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009297376A JP5495779B2 (ja) 2009-12-28 2009-12-28 送信装置および通信システム
US12/961,842 US8891665B2 (en) 2009-12-28 2010-12-07 Transmitting apparatus and communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009297376A JP5495779B2 (ja) 2009-12-28 2009-12-28 送信装置および通信システム

Publications (3)

Publication Number Publication Date
JP2011139246A JP2011139246A (ja) 2011-07-14
JP2011139246A5 JP2011139246A5 (enExample) 2013-01-17
JP5495779B2 true JP5495779B2 (ja) 2014-05-21

Family

ID=44187547

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009297376A Expired - Fee Related JP5495779B2 (ja) 2009-12-28 2009-12-28 送信装置および通信システム

Country Status (2)

Country Link
US (1) US8891665B2 (enExample)
JP (1) JP5495779B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6852320B2 (ja) 2016-09-09 2021-03-31 ブラザー工業株式会社 インクジェット記録装置
DE202021105937U1 (de) * 2021-10-29 2022-02-04 TRUMPF Hüttinger GmbH + Co. KG Steuerschaltung für Treiber

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57135982A (en) * 1981-02-13 1982-08-21 Matsushita Electric Industrial Co Ltd Indicator
JPH09183250A (ja) * 1995-12-29 1997-07-15 Canon Inc 画像形成装置
JP2001069003A (ja) * 1999-08-25 2001-03-16 Nec Saitama Ltd Pll制御回路及びその制御方法
US20030043926A1 (en) * 2001-08-31 2003-03-06 Fujitsu Limited Circuit and method for generating a timing signal, and signal transmission system performing for high-speed signal transmission and reception between LSIs
TWI286735B (en) * 2003-10-28 2007-09-11 Via Tech Inc Combined transmitter
JP2005277888A (ja) * 2004-03-25 2005-10-06 Sony Corp 半導体回路及びcml回路のバイアス制御方法
US7176928B1 (en) * 2004-12-13 2007-02-13 Network Equipment Technologies, Inc. Recovery of a serial bitstream clock at a receiver in serial-over-packet transport
KR100603616B1 (ko) * 2004-12-16 2006-07-24 한국전자통신연구원 광전송 시스템에서 소스 동기 클럭을 이용한 클럭 동기 장치
JP2006303915A (ja) 2005-04-20 2006-11-02 Ricoh Co Ltd 半導体装置,画像読取装置および複写装置
JP4832020B2 (ja) * 2005-07-28 2011-12-07 ルネサスエレクトロニクス株式会社 プリエンファシス回路
JP2007265261A (ja) 2006-03-29 2007-10-11 Renesas Technology Corp 半導体装置と信号伝達システム
JP4692503B2 (ja) * 2007-03-23 2011-06-01 セイコーエプソン株式会社 半導体装置及び電子機器
JP5174493B2 (ja) * 2008-03-06 2013-04-03 株式会社日立製作所 半導体集積回路装置及びアイ開口マージン評価方法

Also Published As

Publication number Publication date
US20110158299A1 (en) 2011-06-30
JP2011139246A (ja) 2011-07-14
US8891665B2 (en) 2014-11-18

Similar Documents

Publication Publication Date Title
US7952409B2 (en) Clock generation circuit and integrated circuit
KR100510332B1 (ko) 클록 생성 회로, 직렬/병렬 변환 장치 및 병렬/직렬 변환장치 및 반도체 장치
US7071750B2 (en) Method for multiple-phase splitting by phase interpolation and circuit the same
JP5442723B2 (ja) ハイブリッド型データ送信回路
US20070223638A1 (en) Isophase Multiphase Clock Signal Generation Circuit and Serial Digital Data Receiving Circuit Using the Same
US6434062B2 (en) Delay locked loop for use in semiconductor memory device
JP4992947B2 (ja) パラレル−シリアル変換器及びパラレルデータ出力器
JP5495779B2 (ja) 送信装置および通信システム
KR20140147179A (ko) 클럭 위상 조절 회로 및 이를 포함하는 반도체 장치
JP2011066621A (ja) データ転送装置
JP2021179798A (ja) タイミング同期回路
CN110166028A (zh) 数字时钟倍频电路系统、数字时钟倍频信号生成方法
JP6394130B2 (ja) 出力回路
KR100811276B1 (ko) 지연고정루프회로
JP3821825B2 (ja) タイミング発生回路
JP2009165064A (ja) 分周回路及び分周方法
JPWO2009069244A1 (ja) 送信方法および送信装置
JP3986358B2 (ja) シリアル・パラレル変換装置、及び半導体装置
JP2007053685A (ja) 半導体集積回路装置
WO2012131920A1 (ja) 位相補正回路及び位相補正方法
JP2008236064A (ja) 多相クロック生成回路およびシリアルデータ受信回路
JP2004147075A (ja) 信号多重化回路及び光通信システム送信器
KR100400318B1 (ko) 클럭 동기화 장치
JP2006217488A (ja) パラレル−シリアル変換回路およびパラレル−シリアル変換方法
JP3782735B2 (ja) サンプリングクロック発生回路およびこれを用いるデータ受信装置

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121127

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20121127

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20131023

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131029

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140106

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140204

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140304

R151 Written notification of patent or utility model registration

Ref document number: 5495779

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

LAPS Cancellation because of no payment of annual fees