JP5414622B2 - 半導体実装基板およびそれを用いた実装構造体 - Google Patents

半導体実装基板およびそれを用いた実装構造体 Download PDF

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Publication number
JP5414622B2
JP5414622B2 JP2010121789A JP2010121789A JP5414622B2 JP 5414622 B2 JP5414622 B2 JP 5414622B2 JP 2010121789 A JP2010121789 A JP 2010121789A JP 2010121789 A JP2010121789 A JP 2010121789A JP 5414622 B2 JP5414622 B2 JP 5414622B2
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Japan
Prior art keywords
electrode
substrate
semiconductor
surface roughness
central portion
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Expired - Fee Related
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JP2010121789A
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English (en)
Japanese (ja)
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JP2011249599A (ja
JP2011249599A5 (enExample
Inventor
かおり 豊田
宏樹 池内
淳也 田中
毅 川端
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Priority to JP2010121789A priority Critical patent/JP5414622B2/ja
Publication of JP2011249599A publication Critical patent/JP2011249599A/ja
Publication of JP2011249599A5 publication Critical patent/JP2011249599A5/ja
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Publication of JP5414622B2 publication Critical patent/JP5414622B2/ja
Expired - Fee Related legal-status Critical Current
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors

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  • Wire Bonding (AREA)
JP2010121789A 2010-05-27 2010-05-27 半導体実装基板およびそれを用いた実装構造体 Expired - Fee Related JP5414622B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010121789A JP5414622B2 (ja) 2010-05-27 2010-05-27 半導体実装基板およびそれを用いた実装構造体

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010121789A JP5414622B2 (ja) 2010-05-27 2010-05-27 半導体実装基板およびそれを用いた実装構造体

Publications (3)

Publication Number Publication Date
JP2011249599A JP2011249599A (ja) 2011-12-08
JP2011249599A5 JP2011249599A5 (enExample) 2013-05-09
JP5414622B2 true JP5414622B2 (ja) 2014-02-12

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ID=45414485

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JP2010121789A Expired - Fee Related JP5414622B2 (ja) 2010-05-27 2010-05-27 半導体実装基板およびそれを用いた実装構造体

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JP (1) JP5414622B2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6214273B2 (ja) * 2013-08-08 2017-10-18 三菱電機株式会社 金属ナノ粒子を用いた接合構造および金属ナノ粒子を用いた接合方法
TWI505380B (zh) * 2013-12-31 2015-10-21 台灣嘉碩科技股份有限公司 導電封裝結構及其製造方法
JP2020155684A (ja) * 2019-03-22 2020-09-24 株式会社カネカ 太陽電池ストリング、太陽電池モジュール、太陽電池セルの製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3893303B2 (ja) * 2002-03-29 2007-03-14 住友ベークライト株式会社 半導体パッケージの製造方法
JP3904210B2 (ja) * 2003-04-28 2007-04-11 株式会社リコー 光学電子デバイスの接合方法及び接合構造
JP4656311B2 (ja) * 2005-07-11 2011-03-23 セイコーエプソン株式会社 電子モジュール
JP4835264B2 (ja) * 2006-05-26 2011-12-14 株式会社村田製作所 部品内蔵回路モジュール基板
JP2009064995A (ja) * 2007-09-07 2009-03-26 Sharp Corp 半導体パッケージおよび電子機器
JP2008263248A (ja) * 2008-08-07 2008-10-30 Sumitomo Electric Ind Ltd 半導体発光素子搭載部材およびその製造方法

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Publication number Publication date
JP2011249599A (ja) 2011-12-08

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