JP5409033B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP5409033B2
JP5409033B2 JP2009028859A JP2009028859A JP5409033B2 JP 5409033 B2 JP5409033 B2 JP 5409033B2 JP 2009028859 A JP2009028859 A JP 2009028859A JP 2009028859 A JP2009028859 A JP 2009028859A JP 5409033 B2 JP5409033 B2 JP 5409033B2
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Japan
Prior art keywords
single crystal
crystal semiconductor
substrate
semiconductor substrate
film
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Expired - Fee Related
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JP2009028859A
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English (en)
Japanese (ja)
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JP2009224769A5 (enExample
JP2009224769A (ja
Inventor
幸一郎 田中
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2009028859A priority Critical patent/JP5409033B2/ja
Publication of JP2009224769A publication Critical patent/JP2009224769A/ja
Publication of JP2009224769A5 publication Critical patent/JP2009224769A5/ja
Application granted granted Critical
Publication of JP5409033B2 publication Critical patent/JP5409033B2/ja
Expired - Fee Related legal-status Critical Current
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Electroluminescent Light Sources (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2009028859A 2008-02-18 2009-02-10 半導体装置の作製方法 Expired - Fee Related JP5409033B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009028859A JP5409033B2 (ja) 2008-02-18 2009-02-10 半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008035851 2008-02-18
JP2008035851 2008-02-18
JP2009028859A JP5409033B2 (ja) 2008-02-18 2009-02-10 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2009224769A JP2009224769A (ja) 2009-10-01
JP2009224769A5 JP2009224769A5 (enExample) 2012-03-29
JP5409033B2 true JP5409033B2 (ja) 2014-02-05

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009028859A Expired - Fee Related JP5409033B2 (ja) 2008-02-18 2009-02-10 半導体装置の作製方法

Country Status (2)

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US (1) US7772089B2 (enExample)
JP (1) JP5409033B2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7348227B1 (en) * 1995-03-23 2008-03-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
KR101538741B1 (ko) * 2009-10-21 2015-07-22 삼성전자주식회사 보안기능을 갖는 데이터 저장매체와 그 출력장치
AR079311A1 (es) 2010-07-06 2012-01-18 Duratex Sa Sistema de conexion de un aparato hidraulico a una tuberia de material plastico
US9499921B2 (en) * 2012-07-30 2016-11-22 Rayton Solar Inc. Float zone silicon wafer manufacturing system and related process
FR2995445B1 (fr) * 2012-09-07 2016-01-08 Soitec Silicon On Insulator Procede de fabrication d'une structure en vue d'une separation ulterieure
US9703010B2 (en) * 2013-02-08 2017-07-11 Corning Incorporated Articles with anti-reflective high-hardness coatings and related methods
EP4170734A4 (en) 2020-06-18 2024-06-19 Nichia Corporation METHOD FOR PRODUCING AN IMAGE DISPLAY DEVICE AND IMAGE DISPLAY DEVICE
CN113130376B (zh) * 2021-04-13 2024-04-09 中国科学院上海微系统与信息技术研究所 一种多层异质单晶薄膜衬底的制备方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58135628A (ja) * 1982-02-08 1983-08-12 Asahi Chem Ind Co Ltd 化合物半導体薄膜構造体の製造方法
JP2913785B2 (ja) * 1990-07-12 1999-06-28 富士通株式会社 半導体装置の製造方法
JP2994837B2 (ja) * 1992-01-31 1999-12-27 キヤノン株式会社 半導体基板の平坦化方法、半導体基板の作製方法、及び半導体基板
US6534380B1 (en) 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
JPH1197379A (ja) 1997-07-25 1999-04-09 Denso Corp 半導体基板及び半導体基板の製造方法
JPH11145438A (ja) 1997-11-13 1999-05-28 Shin Etsu Handotai Co Ltd Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
JP3385972B2 (ja) * 1998-07-10 2003-03-10 信越半導体株式会社 貼り合わせウェーハの製造方法および貼り合わせウェーハ
JP2001223175A (ja) 2000-02-08 2001-08-17 Toyota Central Res & Dev Lab Inc レーザアニール装置およびレーザアニール方法
JP4807080B2 (ja) * 2006-01-13 2011-11-02 株式会社デンソー 半導体装置の製造方法
US7790565B2 (en) * 2006-04-21 2010-09-07 Corning Incorporated Semiconductor on glass insulator made using improved thinning process

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Publication number Publication date
US20090209086A1 (en) 2009-08-20
JP2009224769A (ja) 2009-10-01
US7772089B2 (en) 2010-08-10

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