JP5405012B2 - プラズマエッチング方法及び記憶媒体 - Google Patents
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- 238000000034 method Methods 0.000 title claims description 57
- 238000001020 plasma etching Methods 0.000 title claims description 54
- 238000003860 storage Methods 0.000 title claims description 15
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- 239000010410 layer Substances 0.000 claims description 87
- 239000011229 interlayer Substances 0.000 claims description 84
- 238000005530 etching Methods 0.000 claims description 59
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 30
- 239000001257 hydrogen Substances 0.000 claims description 30
- 229910052739 hydrogen Inorganic materials 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 20
- 210000002381 plasma Anatomy 0.000 description 57
- 239000004065 semiconductor Substances 0.000 description 41
- 235000012431 wafers Nutrition 0.000 description 29
- 238000004519 manufacturing process Methods 0.000 description 16
- 230000006870 function Effects 0.000 description 15
- 239000010949 copper Substances 0.000 description 14
- 229910052802 copper Inorganic materials 0.000 description 13
- 239000000047 product Substances 0.000 description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 12
- 238000006243 chemical reaction Methods 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 5
- 239000003507 refrigerant Substances 0.000 description 5
- 239000007795 chemical reaction product Substances 0.000 description 3
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- 238000004140 cleaning Methods 0.000 description 2
- 238000003795 desorption Methods 0.000 description 2
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 2
- 239000001307 helium Substances 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical group [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000005192 partition Methods 0.000 description 2
- 229920003209 poly(hydridosilsesquioxane) Polymers 0.000 description 2
- 238000001179 sorption measurement Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
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- 238000000354 decomposition reaction Methods 0.000 description 1
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- 230000000694 effects Effects 0.000 description 1
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- 238000004868 gas analysis Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 239000011344 liquid material Substances 0.000 description 1
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 description 1
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- 230000003071 parasitic effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004611 spectroscopical analysis Methods 0.000 description 1
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- H01L21/76813—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving a partial via etch
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/3105—After-treatment
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- H01L21/31111—Etching inorganic layers by chemical means
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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Description
まず、本発明者は、各実施例において半導体デバイス40が形成されたウエハWを準備し、基板処理装置10によって半導体デバイス40に図4の半導体デバイス製造処理を施し、ストップ層42のエッチングにおける低誘電率層間絶縁膜41に対するストップ層42の選択比をウエハW上の複数箇所において測定し、該測定された選択比の平均値(以下、「平均選択比」という。)を下記表1に示した。このとき、ストップ層42のエッチングに用いられたCH2F2ガス/CF4ガスの流量は、実施例1で15/35sccm(CF4ガスに対するCH2F2ガスの流量比が3/7)であり、実施例2で25/25sccm(CF4ガスに対するCH2F2ガスの流量比が1/1)であり、実施例3で35/15sccm(CF4ガスに対するCH2F2ガスの流量比が7/3)であった。
次に、本発明者は、実施例1〜3と同様に、半導体デバイス40に図4の半導体デバイス製造処理を施し、ストップ層42のエッチングにおける低誘電率層間絶縁膜41に対するストップ層42の平均選択比を測定して下記表1に示した。このとき、ストップ層42のエッチングに用いられたCH2F2ガス/CF4ガスの流量は0/50sccm(CF4ガスに対するCH2F2ガスの流量比が0)であった。
まず、本発明者は、各実施例において、処理ガスとしてCF4ガス、N2ガス及びCHF3ガスを含む混合ガスを用いた以外は、実施例1〜3と同じ条件で半導体デバイス40に半導体デバイス製造処理を施し、ストップ層42のエッチングにおける低誘電率層間絶縁膜41に対するストップ層42の平均選択比を測定して下記表2に示した。このとき、ストップ層42のエッチングに用いられたCHF3ガス/CF4ガスの流量は、実施例4で25/25sccm(CF4ガスに対するCHF3ガスの流量比が1/1)であり、実施例5で35/15sccm(CF4ガスに対するCHF3ガスの流量比が7/3)であった。
次に、本発明者は、実施例4,5と同様に、半導体デバイス40に半導体デバイス製造処理を施し、ストップ層42のエッチングにおける低誘電率層間絶縁膜41に対するストップ層42の平均選択比を測定して下記表2に示した。このとき、ストップ層42のエッチングに用いられたCHF3ガス/CF4ガスの流量は0/50sccm(CF4ガスに対するCHF3ガスの流量比が0)であった。
また、本発明者は、半導体デバイス40が形成された別のウエハWを準備し、基板処理装置10によって半導体デバイス40に図4の半導体デバイス製造処理を施した後、低誘電率層間絶縁膜41の成分、具体的には、低誘電率層間絶縁膜41を構成する各種分子の量を昇温脱離ガス分析法(Thremal Desorption Spectroscopy)によって分析した。
次に、本発明者は、実施例6と同様に、半導体デバイス40が形成された別のウエハWを準備し、基板処理装置10によって半導体デバイス40に半導体デバイス製造処理を施した。ここでの半導体デバイス製造処理の条件は、ストップ層42のエッチングにおいてCF4ガス及びN2ガスのみを含み、CH2F2ガスを含まない混合ガスを用いたこと以外、図4の半導体デバイス製造処理の条件と同じであった。その後、低誘電率層間絶縁膜41の成分を昇温脱離ガス分析法によって分析した。
40 半導体デバイス
41 低誘電率層間絶縁膜
42 ストップ層
43 銅配線
44 メタルハードマスク
45 トレンチ
46 ビアホール
47 デポ
Claims (9)
- CwFx(x、wは所定の自然数)からなる層間絶縁膜とエッチングをストップさせるストップ層とを備え、該ストップ層は前記層間絶縁膜に形成された穴又は溝の底部において露出する基板に施すプラズマエッチング方法であって、
前記層間絶縁膜を、O2ガスのみから生じたプラズマ、又はN2ガスのみから生じたプラズマ、又はO2ガスとN2ガスのみから生じたプラズマを用いて選択的にエッチングする絶縁膜エッチングステップと、
前記絶縁膜エッチングステップの後に実行される、前記層間絶縁膜及び前記ストップ層がCyFz(y、zは所定の自然数)ガス及び水素含有ガスから生じたプラズマへ同時に晒されるストップ層エッチングステップとを有することを特徴とするプラズマエッチング方法。 - 前記ストップ層はSiC又はSiCNからなることを特徴とする請求項1記載のプラズマエッチング方法。
- 前記水素含有ガスは、CH3Fガス,CH2F2ガス及びCHF3ガスからなる群から選択された少なくとも1つであることを特徴とする請求項1又は2記載のプラズマエッチング方法。
- 前記水素含有ガスはCH2F2ガスであり且つ前記CyFzガスはCF4ガスであり、前記CF4ガスに対する前記CH2F2ガスの流量比は3/7以上であることを特徴とする請求項1又は2記載のプラズマエッチング方法。
- 前記CF4ガスに対する前記CH2F2ガスの流量比は1/1以上であることを特徴とする請求項4記載のプラズマエッチング方法。
- 前記CF4ガスに対する前記CH2F2ガスの流量比は7/3以上であることを特徴とする請求項5記載のプラズマエッチング方法。
- 前記水素含有ガスはCHF3ガスであり且つ前記CyFzガスはCF4ガスであり、前記CF4ガスに対する前記CHF3ガスの流量比は1/1以上であることを特徴とする請求項1又は2記載のプラズマエッチング方法。
- 前記CF4ガスに対する前記CHF3ガスの流量比は7/3以上であることを特徴とする請求項7記載のプラズマエッチング方法。
- CwFx(x、wは所定の自然数)からなる層間絶縁膜とエッチングをストップさせるストップ層とを備え、該ストップ層は前記層間絶縁膜に形成された穴又は溝の底部において露出する基板に施すプラズマエッチング方法をコンピュータに実行させるプログラムを格納するコンピュータで読み取り可能な記憶媒体であって、
前記プラズマエッチング方法は、
前記層間絶縁膜を、O 2 ガスのみから生じたプラズマ、又はN 2 ガスのみから生じたプラズマ、又はO 2 ガスとN 2 ガスのみから生じたプラズマを用いて選択的にエッチングする絶縁膜エッチングステップと、
前記絶縁膜エッチングステップの後に実行される、前記層間絶縁膜及び前記ストップ層がCyFz(y、zは所定の自然数)ガス及び水素含有ガスから生じたプラズマへ同時に晒されるストップ層エッチングステップとを有することを特徴とする記憶媒体。
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JP2007299572A JP5405012B2 (ja) | 2007-11-19 | 2007-11-19 | プラズマエッチング方法及び記憶媒体 |
US12/273,209 US8252694B2 (en) | 2007-11-19 | 2008-11-18 | Plasma etching method and storage medium |
US13/584,327 US9130018B2 (en) | 2007-11-19 | 2012-08-13 | Plasma etching method and storage medium |
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JP5405012B2 (ja) | 2007-11-19 | 2014-02-05 | 東京エレクトロン株式会社 | プラズマエッチング方法及び記憶媒体 |
JP6308727B2 (ja) * | 2013-06-13 | 2018-04-11 | キヤノン株式会社 | 電子デバイスの製造方法 |
US9646854B2 (en) * | 2014-03-28 | 2017-05-09 | Intel Corporation | Embedded circuit patterning feature selective electroless copper plating |
US11749732B2 (en) * | 2020-09-29 | 2023-09-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Etch profile control of via opening |
US11942371B2 (en) * | 2020-09-29 | 2024-03-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Etch profile control of via opening |
US11664272B2 (en) * | 2020-09-29 | 2023-05-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Etch profile control of gate contact opening |
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US6180518B1 (en) * | 1999-10-29 | 2001-01-30 | Lucent Technologies Inc. | Method for forming vias in a low dielectric constant material |
JP2002110644A (ja) | 2000-09-28 | 2002-04-12 | Nec Corp | エッチング方法 |
US7015135B2 (en) * | 2002-12-10 | 2006-03-21 | Advanced Micro Devices, Inc. | Method and system for reducing contact defects using non conventional contact formation method for semiconductor cells |
US7256134B2 (en) * | 2003-08-01 | 2007-08-14 | Applied Materials, Inc. | Selective etching of carbon-doped low-k dielectrics |
JP2005303191A (ja) | 2004-04-15 | 2005-10-27 | Renesas Technology Corp | 半導体装置の製造方法 |
JP4800077B2 (ja) * | 2006-03-17 | 2011-10-26 | 東京エレクトロン株式会社 | プラズマエッチング方法 |
JP5405012B2 (ja) | 2007-11-19 | 2014-02-05 | 東京エレクトロン株式会社 | プラズマエッチング方法及び記憶媒体 |
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JP2009129918A (ja) | 2009-06-11 |
US20090137127A1 (en) | 2009-05-28 |
US8252694B2 (en) | 2012-08-28 |
US20120309203A1 (en) | 2012-12-06 |
US9130018B2 (en) | 2015-09-08 |
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