JP5402633B2 - 不揮発性半導体記憶装置 - Google Patents
不揮発性半導体記憶装置 Download PDFInfo
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- JP5402633B2 JP5402633B2 JP2009526510A JP2009526510A JP5402633B2 JP 5402633 B2 JP5402633 B2 JP 5402633B2 JP 2009526510 A JP2009526510 A JP 2009526510A JP 2009526510 A JP2009526510 A JP 2009526510A JP 5402633 B2 JP5402633 B2 JP 5402633B2
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- gate electrode
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- 239000004065 semiconductor Substances 0.000 title claims description 108
- 239000000758 substrate Substances 0.000 claims description 52
- 238000003860 storage Methods 0.000 claims description 24
- 238000009792 diffusion process Methods 0.000 claims description 12
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 7
- 239000010703 silicon Substances 0.000 claims description 7
- 239000012535 impurity Substances 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 26
- 230000015654 memory Effects 0.000 description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 10
- 229920005591 polysilicon Polymers 0.000 description 10
- 229910052814 silicon oxide Inorganic materials 0.000 description 10
- 238000000034 method Methods 0.000 description 9
- 230000003647 oxidation Effects 0.000 description 8
- 238000007254 oxidation reaction Methods 0.000 description 8
- 238000001312 dry etching Methods 0.000 description 7
- 230000004048 modification Effects 0.000 description 7
- 238000012986 modification Methods 0.000 description 7
- 238000002955 isolation Methods 0.000 description 6
- 238000005036 potential barrier Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000005684 electric field Effects 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- -1 Metal Oxide Nitride Chemical class 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 239000002784 hot electron Substances 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
- H01L29/42344—Gate electrodes for transistors with charge trapping gate insulator with at least one additional gate, e.g. program gate, erase gate or select gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
- H01L29/7923—Programmable transistors with more than two possible different levels of programmation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Description
上記した特許文献は、以下のとおりである。
h<(√2−1/cosθ)×d
が成立する不揮発性半導体記憶装置を提供する。
h<(√2−1/cosθ)×d
が成立する。
h+d/cosθ
となる。
h<(√2−1/cosθ)×d
を採用すると、ギャップ領域におけるコントロールゲート電極20の底面とチャネル領域との距離を図12の構造よりも短くすることができ、より効果的に読み取り電流を増大させることができる。本実施形態により、読出し電流が大きな半導体記憶装置が実現可能となる。また、本実施形態では、ワードゲート電極とコントロールゲート電極との間の絶縁膜の膜厚を薄くしないので、半導体記憶装置の動作速度が低下することはない。
h<(√2−1/cosθ)×d
が成立する。このような構造を採用することで、第1の実施形態と同様に、コントロールゲート電極12の底面とチャネル領域との距離を短くすることができ、より効果的に読み取り電流を増大させることができる。
Claims (9)
- 半導体基板上に形成され、チャネル領域及び該チャネル領域を挟んで形成された一対の不純物拡散領域と、
前記チャネル領域の上部に形成され、相互に平行に延びる第1のゲート電極及び少なくとも1つの第2のゲート電極と、
前記第1のゲート電極と前記半導体基板との間に形成され、電荷蓄積層を含まない第1のゲート絶縁膜と、
前記第1のゲート電極と前記第2のゲート電極との間、及び、前記第2のゲート電極と前記半導体基板との間に形成され、電荷蓄積層を含む第2のゲート絶縁膜とを備え、
前記第1のゲート電極の前記第2のゲート電極に隣接する側面が、半導体基板に隣接する底部に、前記第2のゲート電極に向かって突出する突出部を有し、
前記突出部の傾斜面と前記半導体基板の表面との成す角度をθとし、前記突出部の傾斜面の縁部と前記半導体基板との距離をhとし、前記第2のゲート絶縁膜の膜厚をdとすると、下記関係:
h<(√2−1/cosθ)×d
が成立する不揮発性半導体記憶装置。 - 請求項1に記載の不揮発性半導体記憶装置において、
前記第1のゲート電極の頂面の縁部がチャンファーを形成する不揮発性半導体記憶装置。 - 請求項1又は2に記載の不揮発性半導体記憶装置において、
前記少なくとも1つの第2のゲート電極が、相互に平行に延びる一対の第2のゲート電極を含み、該一対の第2のゲート電極が、前記第1のゲート電極を挟んで配置される不揮発性半導体記憶装置。 - 請求項3に記載の不揮発性半導体記憶装置において、
それぞれが前記第1及び第2のゲート電極を含む複数のゲート電極グループが、複数配設され、該複数のゲート電極グループが相互に平行に延びる不揮発性半導体装置。 - 請求項1又は2に記載の不揮発性半導体記憶装置において、
前記少なくとも1つの第2のゲート電極が1つの第2のゲート電極を含み、該第2のゲート電極が、前記第1のゲート電極の側面及び頂面の部分と対向して配置される不揮発性半導体記憶装置。 - 請求項5に記載の不揮発性半導体記憶装置において、
前記第1のゲート電極の前記第2のゲート電極と対向していない頂面の部分が、前記第1のゲート電極の前記第2のゲート電極と対向している頂面の部分よりも低い位置にある不揮発性半導体記憶装置。 - 請求項5又は6に記載の不揮発性半導体記憶装置において、
それぞれが前記第1及び第2のゲート電極を含む複数のゲート電極グループが、複数配設され、該複数のゲート電極グループが相互に平行に延びる不揮発性半導体装置。 - 請求項5乃至7の何れか一項に記載の不揮発性半導体記憶装置において、
隣接する2つのゲート電極グループが、該2つのゲート電極グループの中心面に関して互いに対称に配置される不揮発性半導体記憶装置。 - 請求項1乃至8の何れか一項に記載の不揮発性半導体記憶装置において、
前記第2のゲート絶縁膜は、窒化シリコン膜、酸窒化シリコン膜、及び、高誘電率絶縁膜から成る群から選択される少なくとも1つの絶縁膜を含む不揮発性半導体記憶装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009526510A JP5402633B2 (ja) | 2007-08-09 | 2008-08-11 | 不揮発性半導体記憶装置 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007207377 | 2007-08-09 | ||
JP2007207377 | 2007-08-09 | ||
PCT/JP2008/064395 WO2009020228A1 (ja) | 2007-08-09 | 2008-08-11 | 不揮発性半導体記憶装置 |
JP2009526510A JP5402633B2 (ja) | 2007-08-09 | 2008-08-11 | 不揮発性半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2009020228A1 JPWO2009020228A1 (ja) | 2010-11-04 |
JP5402633B2 true JP5402633B2 (ja) | 2014-01-29 |
Family
ID=40341452
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009526510A Expired - Fee Related JP5402633B2 (ja) | 2007-08-09 | 2008-08-11 | 不揮発性半導体記憶装置 |
Country Status (2)
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JP (1) | JP5402633B2 (ja) |
WO (1) | WO2009020228A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6274826B2 (ja) * | 2013-11-14 | 2018-02-07 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP6275920B2 (ja) * | 2015-03-30 | 2018-02-07 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005064295A (ja) * | 2003-08-14 | 2005-03-10 | Oki Electric Ind Co Ltd | 半導体不揮発性メモリ、この半導体不揮発性メモリへの情報の記録方法、及びこの半導体不揮発性メモリからの情報の読み出し方法 |
JP2005123518A (ja) * | 2003-10-20 | 2005-05-12 | Renesas Technology Corp | 不揮発性半導体記憶装置およびその製造方法 |
JP2005294498A (ja) * | 2004-03-31 | 2005-10-20 | Renesas Technology Corp | 不揮発性半導体記憶装置 |
JP2006287096A (ja) * | 2005-04-04 | 2006-10-19 | Sharp Corp | 半導体記憶装置及びその製造方法 |
-
2008
- 2008-08-11 WO PCT/JP2008/064395 patent/WO2009020228A1/ja active Application Filing
- 2008-08-11 JP JP2009526510A patent/JP5402633B2/ja not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005064295A (ja) * | 2003-08-14 | 2005-03-10 | Oki Electric Ind Co Ltd | 半導体不揮発性メモリ、この半導体不揮発性メモリへの情報の記録方法、及びこの半導体不揮発性メモリからの情報の読み出し方法 |
JP2005123518A (ja) * | 2003-10-20 | 2005-05-12 | Renesas Technology Corp | 不揮発性半導体記憶装置およびその製造方法 |
JP2005294498A (ja) * | 2004-03-31 | 2005-10-20 | Renesas Technology Corp | 不揮発性半導体記憶装置 |
JP2006287096A (ja) * | 2005-04-04 | 2006-10-19 | Sharp Corp | 半導体記憶装置及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
WO2009020228A1 (ja) | 2009-02-12 |
JPWO2009020228A1 (ja) | 2010-11-04 |
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