JP5388673B2 - 電子部品 - Google Patents
電子部品 Download PDFInfo
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- JP5388673B2 JP5388673B2 JP2009104586A JP2009104586A JP5388673B2 JP 5388673 B2 JP5388673 B2 JP 5388673B2 JP 2009104586 A JP2009104586 A JP 2009104586A JP 2009104586 A JP2009104586 A JP 2009104586A JP 5388673 B2 JP5388673 B2 JP 5388673B2
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- sealing resin
- semiconductor chip
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- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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Description
図10では、部品2Aの外周の端部Eと部品2Aの上に形成されたバンプ14の端部Hとを結ぶ直線E−Hと、部品2Aの表面Fとのなす角度θが、30°以上となるようにバンプ14の位置を決定し、ワイヤ5が部品2Aの端部Eとの間でショートさせないようにした技術が記載されている。
図1A,図1B〜図4は本発明の実施の形態1を示す。
図1Aは本発明の電子部品を示す。
半導体チップ2に前記傾斜面31を加工する工程を図2Aと図2Bに示す。
この斜め加工は、ウエハ状態から半導体チップ2にダイシングする時に、図2Aに示すように、カッター9aの刃先を半導体チップ2の加工部分の角度と同様の角度がついた形状に作製し、そのカッター刃先を用いてダイシングすることで作製できる。その後、通常の角度のついていないカッター刃先を用いてダイシングする。
このように加工された半導体チップ2を用いることにより、ワイヤ5が半導体チップ2の外周のエッジ部分に接触することが無くなる。また、表面張力により半導体チップ2の外周に対応する部分の第2封止樹脂3が盛り上がることもないので、電子部品の全体の高さを低く抑えることができる。
さらに、理想的な形として、図1Bの傾斜面31の下側の位置が、半導体チップ10の厚みの半分程度の部分に位置することがよい。つまり、傾斜面31の下側の位置を半導体チップ10の厚みの半分よりも下の位置すると、半導体チップ10の加工時、実装時に破損してしまう確率が高い。逆に、傾斜面31の下側の位置を半導体チップ10の厚みの半分よりも上に位置すると、ワイヤ5と接触してしまう。
(実施の形態2)
図5A,図5B,図5Cは本発明の実施の形態2を示す。
なお、2段加工により、実施の形態1で示したワイヤ5に沿う形状にすれば、さらによいし、2段の凸部を結んだラインの角度が30°から75°でもさらによい。また、各段に丸みを持たせてもよい。2段でなくとも、階段状の多段でもよい。
図6A〜図6Eは本発明の実施の形態3を示す。
実施の形態1、実施の形態2では、ウエハ状態から半導体チップ2を作製する時に、カッター刃を使用したが、この実施の形態ではエッチングを用いる点が異なっている。
レジストはポリイミド系の樹脂を用い、レジスト膜を剥離し除去する液も使用必要である。エッチング液としては、混酸系エッチング液を使用できる。これらの材料は、各種メーカーから販売されている。エッチングを早くするには、液の濃度を上げることで可能である。また、処理温度を上げることでもできる。これらの必要な材料は、関東化学株式会社、東京応化工業株式会社、林純薬工業株式会社、和光純薬工業株式会社などから入手できる。プロセス条件などは、それぞれの材料の標準の仕様を実施するだけでよい。
図7と図8は本発明の実施の形態4を示す。
上記の各実施の形態では、ワイヤ5で半導体チップ2と基板1とを接続し、ワイヤ5の中間部が浮いている状態で第2封止樹脂3を充填したが、この実施の形態4では、図7に示すようにワイヤ5と前記傾斜面31の間に電気的絶縁物質11が挟まれている点が異なっている。
図9は本発明の実施の形態5を示す。
上記の各実施の形態では半導体チップ2の外周のエッジ部を面取りして傾斜面31を形成すると共に、ワイヤ5で接続し、粘度が異なる第1封止樹脂4と第2封止樹脂3を充填して封止したが、この実施の形態5では半導体チップ2の外周のエッジ部は面取りされていない点が異なっている。
2 半導体チップ
3 第2封止樹脂
4 第1封止樹脂
5 ワイヤ
E 端部
7 ダイアタッチフィルム
8 シート
9a〜9f カッター刃
10 ウエハ状態の半導体チップ
11 電気的絶縁物質
12 封止樹脂の盛り上がり部分
13 塗布シリンジ
20 第1のレジスト
21 第2のレジスト
22 開口部
23 開口部
31 傾斜面
Claims (4)
- 基板と、
前記基板の上に取り付けられた部品と、
前記部品の上面を覆う第2封止樹脂と、
前記基板の上で、前記部品と前記第2封止樹脂との外周部を取り囲む第1封止樹脂と、
前記第1封止樹脂と前記第2封止樹脂中に渡って、前記部品の上面と前記基板の上面とを電気接続するワイヤと、を有し、
前記第2封止樹脂は前記第1封止樹脂よりも軟らかく、
前記第2封止樹脂と前記第1封止樹脂との境界面と、前記部品の外周部側面とは同一面であり、
前記部品の外周のエッジ部分は、前記ワイヤが近傍を通過する辺の一部または全部が面取りされた傾斜面に形成されており、
前記ワイヤが前記傾斜面に沿って前記基板に延設されている
電子部品。 - 前記第2封止樹脂と前記第1封止樹脂との上面は、同一平面を形成している
請求項1記載の電子部品。 - 前記部品の外周のエッジ部分のうちの前記ワイヤが近傍を通過する辺の部分のみが面取りされた傾斜面に形成された
請求項1または2記載の電子部品。 - 前記ワイヤと前記部品の面取りされた前記傾斜面との間に電気絶縁物質が介在している
請求項1から3のいずれか1項に記載の電子部品。
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Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8143102B2 (en) * | 2007-10-04 | 2012-03-27 | Stats Chippac Ltd. | Integrated circuit package system including die having relieved active region |
EP2450960A1 (en) * | 2009-06-29 | 2012-05-09 | Kyocera Corporation | Method for manufacturing photoelectric conversion elements, device for manufacturing photoelectric conversion elements, and photoelectric conversion element |
JP2013029722A (ja) * | 2011-07-29 | 2013-02-07 | Sony Corp | 表示装置および電子機器 |
US9521737B2 (en) * | 2012-11-28 | 2016-12-13 | Mitsubishi Electric Corporation | Power module |
US9443807B2 (en) * | 2013-09-06 | 2016-09-13 | Infineon Technologies Ag | Semiconductor device and method for manufacturing a semiconductor device |
CN104575584B (zh) * | 2013-10-23 | 2018-11-30 | 钰创科技股份有限公司 | 具有嵌入式内存的系统级封装内存模块 |
JP6402935B2 (ja) * | 2015-05-29 | 2018-10-10 | 日亜化学工業株式会社 | 半導体装置 |
JP6955918B2 (ja) * | 2017-07-03 | 2021-10-27 | 株式会社ディスコ | 基板の加工方法 |
JP2020113584A (ja) * | 2019-01-08 | 2020-07-27 | 豊田合成株式会社 | 発光素子の製造方法 |
Family Cites Families (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63111653A (ja) | 1986-10-30 | 1988-05-16 | Sony Corp | 半導体装置 |
JPS63300508A (ja) | 1987-05-29 | 1988-12-07 | Nec Corp | 樹脂封止型半導体装置 |
JPS645449A (en) | 1987-06-30 | 1989-01-10 | Ulvac Corp | Method for retaining freshness of vegetable, fruit, flowering plant or the like |
JPH0225015A (ja) | 1988-07-13 | 1990-01-26 | Hitachi Ltd | 樹脂封止型半導体装置 |
JPH04356936A (ja) | 1991-05-31 | 1992-12-10 | Mitsubishi Electric Corp | 半導体装置 |
JP3683597B2 (ja) * | 1994-02-08 | 2005-08-17 | 東レ・ダウコーニング株式会社 | 樹脂封止半導体装置 |
NL9400766A (nl) * | 1994-05-09 | 1995-12-01 | Euratec Bv | Werkwijze voor het inkapselen van een geintegreerde halfgeleiderschakeling. |
JP3233535B2 (ja) * | 1994-08-15 | 2001-11-26 | 株式会社東芝 | 半導体装置及びその製造方法 |
JPH1064854A (ja) | 1996-07-18 | 1998-03-06 | Hewlett Packard Co <Hp> | ウェーハのカット方法 |
JPH1064855A (ja) | 1996-08-14 | 1998-03-06 | Toshiba Corp | 半導体装置の製造方法 |
JP2000306932A (ja) * | 1999-04-21 | 2000-11-02 | Denso Corp | 半導体装置の製造方法 |
JP3406270B2 (ja) * | 2000-02-17 | 2003-05-12 | 沖電気工業株式会社 | 半導体装置及びその製造方法 |
DE10024336A1 (de) * | 2000-05-17 | 2001-11-22 | Heidenhain Gmbh Dr Johannes | Bauelementanordnung und Verfahren zur Herstellung einer Bauelementanordnung |
JP2002222914A (ja) * | 2001-01-26 | 2002-08-09 | Sony Corp | 半導体装置及びその製造方法 |
TW502408B (en) | 2001-03-09 | 2002-09-11 | Advanced Semiconductor Eng | Chip with chamfer |
US20030006493A1 (en) * | 2001-07-04 | 2003-01-09 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and manufacturing method thereof |
JP2003031604A (ja) * | 2001-07-16 | 2003-01-31 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US20040026768A1 (en) * | 2002-08-08 | 2004-02-12 | Taar Reginald T. | Semiconductor dice with edge cavities |
US6791197B1 (en) | 2002-08-26 | 2004-09-14 | Integrated Device Technology, Inc. | Reducing layer separation and cracking in semiconductor devices |
JP4093018B2 (ja) * | 2002-11-08 | 2008-05-28 | 沖電気工業株式会社 | 半導体装置及びその製造方法 |
JP4390541B2 (ja) * | 2003-02-03 | 2009-12-24 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
JP2004319530A (ja) * | 2003-02-28 | 2004-11-11 | Sanyo Electric Co Ltd | 光半導体装置およびその製造方法 |
JP2004281563A (ja) | 2003-03-13 | 2004-10-07 | Alps Electric Co Ltd | 電子回路ユニット、及びその製造方法 |
US7064452B2 (en) * | 2003-11-04 | 2006-06-20 | Tai-Saw Technology Co., Ltd. | Package structure with a retarding structure and method of making same |
US7145253B1 (en) * | 2004-06-09 | 2006-12-05 | Amkor Technology, Inc. | Encapsulated sensor device |
DE102004039693B4 (de) * | 2004-08-16 | 2009-06-10 | Infineon Technologies Ag | Vergussmasse, Chipmodul und Verfahren zur Herstellung eines Chipmoduls |
US7148560B2 (en) * | 2005-01-25 | 2006-12-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | IC chip package structure and underfill process |
TWI261898B (en) | 2005-08-18 | 2006-09-11 | Advanced Semiconductor Eng | Chip package structure |
-
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JP2009295964A (ja) | 2009-12-17 |
CN101577258B (zh) | 2013-01-23 |
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