JP5337022B2 - フォールト・トレランス・コンピューティング・システムにおけるエラー・フィルタリング - Google Patents

フォールト・トレランス・コンピューティング・システムにおけるエラー・フィルタリング Download PDF

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Publication number
JP5337022B2
JP5337022B2 JP2009506481A JP2009506481A JP5337022B2 JP 5337022 B2 JP5337022 B2 JP 5337022B2 JP 2009506481 A JP2009506481 A JP 2009506481A JP 2009506481 A JP2009506481 A JP 2009506481A JP 5337022 B2 JP5337022 B2 JP 5337022B2
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logic
logical
devices
voter
programmable
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JP2009506481A
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Japanese (ja)
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JP2009534738A5 (https=
JP2009534738A (ja
Inventor
カンマン，ポール・ディー
パーメット，ダリル・アイ
スミス，グラント・エル
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Honeywell International Inc
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Honeywell International Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
    • G06F11/184—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0736—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function
    • G06F11/0739—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function in a data processing system embedded in automotive or aircraft systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Tests Of Electronic Circuits (AREA)
JP2009506481A 2006-04-21 2007-01-19 フォールト・トレランス・コンピューティング・システムにおけるエラー・フィルタリング Expired - Fee Related JP5337022B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/379,633 2006-04-21
US11/379,633 US20070260939A1 (en) 2006-04-21 2006-04-21 Error filtering in fault tolerant computing systems
PCT/US2007/001351 WO2007133300A2 (en) 2006-04-21 2007-01-19 Error filtering in fault tolerant computing systems

Publications (3)

Publication Number Publication Date
JP2009534738A JP2009534738A (ja) 2009-09-24
JP2009534738A5 JP2009534738A5 (https=) 2010-02-25
JP5337022B2 true JP5337022B2 (ja) 2013-11-06

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JP2009506481A Expired - Fee Related JP5337022B2 (ja) 2006-04-21 2007-01-19 フォールト・トレランス・コンピューティング・システムにおけるエラー・フィルタリング

Country Status (4)

Country Link
US (1) US20070260939A1 (https=)
EP (1) EP2013733B1 (https=)
JP (1) JP5337022B2 (https=)
WO (1) WO2007133300A2 (https=)

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US8200947B1 (en) * 2008-03-24 2012-06-12 Nvidia Corporation Systems and methods for voting among parallel threads
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US8397133B2 (en) * 2008-11-26 2013-03-12 Arizona Board Of Regents For And On Behalf Of Arizona State University Circuits and methods for dual redundant register files with error detection and correction mechanisms
JP5446229B2 (ja) * 2008-12-04 2014-03-19 日本電気株式会社 電子デバイス、電子デバイスの故障検出方法および電子デバイスの故障回復方法
CN101562543B (zh) * 2009-05-25 2013-07-31 阿里巴巴集团控股有限公司 一种缓存数据的处理方法、处理系统和装置
US8564616B1 (en) 2009-07-17 2013-10-22 Nvidia Corporation Cull before vertex attribute fetch and vertex lighting
US8542247B1 (en) 2009-07-17 2013-09-24 Nvidia Corporation Cull before vertex attribute fetch and vertex lighting
US8384736B1 (en) 2009-10-14 2013-02-26 Nvidia Corporation Generating clip state for a batch of vertices
US8976195B1 (en) 2009-10-14 2015-03-10 Nvidia Corporation Generating clip state for a batch of vertices
JP5660798B2 (ja) * 2010-04-01 2015-01-28 三菱電機株式会社 情報処理装置
JP5618792B2 (ja) * 2010-11-30 2014-11-05 三菱電機株式会社 エラー検出修復装置
JP5699057B2 (ja) * 2011-08-24 2015-04-08 株式会社日立製作所 プログラマブルデバイス、プログラマブルデバイスのリコンフィグ方法および電子デバイス
JP5569752B2 (ja) * 2011-12-08 2014-08-13 株式会社デンソー 電子制御装置、および、これを用いた電動パワーステアリング装置
US9026864B2 (en) * 2012-02-29 2015-05-05 Red Hat, Inc. Offloading health-checking policy
JP2014052781A (ja) * 2012-09-06 2014-03-20 Fujitsu Telecom Networks Ltd Ｆｐｇａ監視制御回路
US9116531B2 (en) * 2013-02-27 2015-08-25 General Electric Company Methods and systems for current output mode configuration of universal input-output modules
US9612900B2 (en) * 2013-03-15 2017-04-04 SEAKR Engineering, Inc. Centralized configuration control of reconfigurable computing devices
JP6182924B2 (ja) * 2013-03-25 2017-08-23 オムロン株式会社 同期シリアルインタフェース回路およびモーション制御機能モジュール
WO2015068207A1 (ja) * 2013-11-05 2015-05-14 株式会社日立製作所 プログラマブルデバイス
US9294263B2 (en) * 2014-01-02 2016-03-22 Advanced Micro Devices, Inc. Methods and systems of synchronizer selection
US8922242B1 (en) * 2014-02-20 2014-12-30 Xilinx, Inc. Single event upset mitigation
WO2017091399A1 (en) * 2015-11-23 2017-06-01 Armor Defense Inc. Extracting malicious instructions on a virtual machine in a network environment
US10157276B2 (en) 2015-11-23 2018-12-18 Armor Defense Inc. Extracting malicious instructions on a virtual machine in a network environment
GB2555627B (en) * 2016-11-04 2019-02-20 Advanced Risc Mach Ltd Error detection
US10185635B2 (en) * 2017-03-20 2019-01-22 Arm Limited Targeted recovery process
US10423504B2 (en) * 2017-08-04 2019-09-24 The Boeing Company Computer architecture for mitigating transistor faults due to radiation
CN111506448B (zh) * 2020-04-16 2023-03-24 广西师范大学 一种二维处理器阵列的快速重构方法
WO2021101643A2 (en) 2020-10-16 2021-05-27 Futurewei Technologies, Inc. Cpu-gpu lockstep system

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Also Published As

Publication number Publication date
WO2007133300A3 (en) 2008-03-13
WO2007133300A2 (en) 2007-11-22
US20070260939A1 (en) 2007-11-08
JP2009534738A (ja) 2009-09-24
EP2013733A2 (en) 2009-01-14
EP2013733B1 (en) 2012-02-22

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