JP2009534738A5 - - Google Patents

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Publication number
JP2009534738A5
JP2009534738A5 JP2009506481A JP2009506481A JP2009534738A5 JP 2009534738 A5 JP2009534738 A5 JP 2009534738A5 JP 2009506481 A JP2009506481 A JP 2009506481A JP 2009506481 A JP2009506481 A JP 2009506481A JP 2009534738 A5 JP2009534738 A5 JP 2009534738A5
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JP
Japan
Prior art keywords
error
programmable
programmable error
threshold
single event
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JP2009506481A
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English (en)
Japanese (ja)
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JP5337022B2 (ja
JP2009534738A (ja
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Priority claimed from US11/379,633 external-priority patent/US20070260939A1/en
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Publication of JP2009534738A5 publication Critical patent/JP2009534738A5/ja
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Publication of JP5337022B2 publication Critical patent/JP5337022B2/ja
Expired - Fee Related legal-status Critical Current
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JP2009506481A 2006-04-21 2007-01-19 フォールト・トレランス・コンピューティング・システムにおけるエラー・フィルタリング Expired - Fee Related JP5337022B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/379,633 2006-04-21
US11/379,633 US20070260939A1 (en) 2006-04-21 2006-04-21 Error filtering in fault tolerant computing systems
PCT/US2007/001351 WO2007133300A2 (en) 2006-04-21 2007-01-19 Error filtering in fault tolerant computing systems

Publications (3)

Publication Number Publication Date
JP2009534738A JP2009534738A (ja) 2009-09-24
JP2009534738A5 true JP2009534738A5 (https=) 2010-02-25
JP5337022B2 JP5337022B2 (ja) 2013-11-06

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ID=38662533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009506481A Expired - Fee Related JP5337022B2 (ja) 2006-04-21 2007-01-19 フォールト・トレランス・コンピューティング・システムにおけるエラー・フィルタリング

Country Status (4)

Country Link
US (1) US20070260939A1 (https=)
EP (1) EP2013733B1 (https=)
JP (1) JP5337022B2 (https=)
WO (1) WO2007133300A2 (https=)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080195789A1 (en) * 2006-08-14 2008-08-14 Paul Douglas Stoner Method And Apparatus For Handling Data And Aircraft Employing Same
US20080089087A1 (en) * 2006-10-16 2008-04-17 Paul Douglas Stoner Apparatus and Method Pertaining to Light-Based Power Distribution in a Vehicle
US7743285B1 (en) * 2007-04-17 2010-06-22 Hewlett-Packard Development Company, L.P. Chip multiprocessor with configurable fault isolation
JP2009187199A (ja) * 2008-02-05 2009-08-20 Panasonic Corp 情報処理システム及び情報処理方法
US8200947B1 (en) * 2008-03-24 2012-06-12 Nvidia Corporation Systems and methods for voting among parallel threads
IT1391785B1 (it) * 2008-11-21 2012-01-27 St Microelectronics Srl Sistema elettronico per il rilevamento di un guasto
US8397133B2 (en) * 2008-11-26 2013-03-12 Arizona Board Of Regents For And On Behalf Of Arizona State University Circuits and methods for dual redundant register files with error detection and correction mechanisms
JP5446229B2 (ja) * 2008-12-04 2014-03-19 日本電気株式会社 電子デバイス、電子デバイスの故障検出方法および電子デバイスの故障回復方法
CN101562543B (zh) * 2009-05-25 2013-07-31 阿里巴巴集团控股有限公司 一种缓存数据的处理方法、处理系统和装置
US8564616B1 (en) 2009-07-17 2013-10-22 Nvidia Corporation Cull before vertex attribute fetch and vertex lighting
US8542247B1 (en) 2009-07-17 2013-09-24 Nvidia Corporation Cull before vertex attribute fetch and vertex lighting
US8384736B1 (en) 2009-10-14 2013-02-26 Nvidia Corporation Generating clip state for a batch of vertices
US8976195B1 (en) 2009-10-14 2015-03-10 Nvidia Corporation Generating clip state for a batch of vertices
JP5660798B2 (ja) * 2010-04-01 2015-01-28 三菱電機株式会社 情報処理装置
JP5618792B2 (ja) * 2010-11-30 2014-11-05 三菱電機株式会社 エラー検出修復装置
JP5699057B2 (ja) * 2011-08-24 2015-04-08 株式会社日立製作所 プログラマブルデバイス、プログラマブルデバイスのリコンフィグ方法および電子デバイス
JP5569752B2 (ja) * 2011-12-08 2014-08-13 株式会社デンソー 電子制御装置、および、これを用いた電動パワーステアリング装置
US9026864B2 (en) * 2012-02-29 2015-05-05 Red Hat, Inc. Offloading health-checking policy
JP2014052781A (ja) * 2012-09-06 2014-03-20 Fujitsu Telecom Networks Ltd Ｆｐｇａ監視制御回路
US9116531B2 (en) * 2013-02-27 2015-08-25 General Electric Company Methods and systems for current output mode configuration of universal input-output modules
US9612900B2 (en) * 2013-03-15 2017-04-04 SEAKR Engineering, Inc. Centralized configuration control of reconfigurable computing devices
JP6182924B2 (ja) * 2013-03-25 2017-08-23 オムロン株式会社 同期シリアルインタフェース回路およびモーション制御機能モジュール
WO2015068207A1 (ja) * 2013-11-05 2015-05-14 株式会社日立製作所 プログラマブルデバイス
US9294263B2 (en) * 2014-01-02 2016-03-22 Advanced Micro Devices, Inc. Methods and systems of synchronizer selection
US8922242B1 (en) * 2014-02-20 2014-12-30 Xilinx, Inc. Single event upset mitigation
WO2017091399A1 (en) * 2015-11-23 2017-06-01 Armor Defense Inc. Extracting malicious instructions on a virtual machine in a network environment
US10157276B2 (en) 2015-11-23 2018-12-18 Armor Defense Inc. Extracting malicious instructions on a virtual machine in a network environment
GB2555627B (en) * 2016-11-04 2019-02-20 Advanced Risc Mach Ltd Error detection
US10185635B2 (en) * 2017-03-20 2019-01-22 Arm Limited Targeted recovery process
US10423504B2 (en) * 2017-08-04 2019-09-24 The Boeing Company Computer architecture for mitigating transistor faults due to radiation
CN111506448B (zh) * 2020-04-16 2023-03-24 广西师范大学 一种二维处理器阵列的快速重构方法
WO2021101643A2 (en) 2020-10-16 2021-05-27 Futurewei Technologies, Inc. Cpu-gpu lockstep system

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4644498A (en) * 1983-04-04 1987-02-17 General Electric Company Fault-tolerant real time clock
JPH0619641B2 (ja) * 1983-07-15 1994-03-16 株式会社日立製作所 多重系制御システムのデータ管理方式
CA1337132C (en) * 1988-07-15 1995-09-26 Robert Filepp Reception system for an interactive computer network and method of operation
JPH04195639A (ja) * 1990-11-28 1992-07-15 Teijin Seiki Co Ltd 多重プロセッサシステム及びその出力管理方法
JP3246751B2 (ja) * 1991-01-25 2002-01-15 株式会社日立製作所 高信頼化コンピュータシステム及びその復旧方法並びにプロセッサボード及びその交換方法
JP2821307B2 (ja) * 1992-03-23 1998-11-05 株式会社日立製作所 高信頼化コンピュータシステムの割込み制御方法
JPH07175765A (ja) * 1993-10-25 1995-07-14 Mitsubishi Electric Corp 計算機の障害回復方法
JP3365581B2 (ja) * 1994-07-29 2003-01-14 富士通株式会社 自己修復機能付き情報処理装置
JPH08235015A (ja) * 1995-02-27 1996-09-13 Mitsubishi Electric Corp プロセッサ装置並びにプロセッサ故障診断方法
JP3438490B2 (ja) * 1996-10-29 2003-08-18 株式会社日立製作所 冗長システム
US6178522B1 (en) * 1998-06-02 2001-01-23 Alliedsignal Inc. Method and apparatus for managing redundant computer-based systems for fault tolerant computing
US6104211A (en) * 1998-09-11 2000-08-15 Xilinx, Inc. System for preventing radiation failures in programmable logic devices
US6856600B1 (en) * 2000-01-04 2005-02-15 Cisco Technology, Inc. Method and apparatus for isolating faults in a switching matrix
US6715116B2 (en) * 2000-01-26 2004-03-30 Hewlett-Packard Company, L.P. Memory data verify operation
US6910173B2 (en) * 2000-08-08 2005-06-21 The Board Of Trustees Of The Leland Stanford Junior University Word voter for redundant systems
EP1246033A1 (de) * 2001-08-23 2002-10-02 Siemens Aktiengesellschaft Verfahren zur Überwachung konsistenter Speicherinhalte in redundanten Systemen
US20040078508A1 (en) * 2002-10-02 2004-04-22 Rivard William G. System and method for high performance data storage and retrieval
JP2004133496A (ja) * 2002-10-08 2004-04-30 Hitachi Ltd コンピュータシステム
US7089484B2 (en) * 2002-10-21 2006-08-08 International Business Machines Corporation Dynamic sparing during normal computer system operation
US20060020852A1 (en) * 2004-03-30 2006-01-26 Bernick David L Method and system of servicing asynchronous interrupts in multiple processors executing a user program
US20050268061A1 (en) * 2004-05-31 2005-12-01 Vogt Pete D Memory channel with frame misalignment
US7392426B2 (en) * 2004-06-15 2008-06-24 Honeywell International Inc. Redundant processing architecture for single fault tolerance
US7320064B2 (en) * 2004-07-23 2008-01-15 Honeywell International Inc. Reconfigurable computing architecture for space applications

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