JP5305712B2 - 半導体基板の作製方法 - Google Patents

半導体基板の作製方法 Download PDF

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Publication number
JP5305712B2
JP5305712B2 JP2008095680A JP2008095680A JP5305712B2 JP 5305712 B2 JP5305712 B2 JP 5305712B2 JP 2008095680 A JP2008095680 A JP 2008095680A JP 2008095680 A JP2008095680 A JP 2008095680A JP 5305712 B2 JP5305712 B2 JP 5305712B2
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Japan
Prior art keywords
layer
single crystal
semiconductor substrate
crystal semiconductor
substrate
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Expired - Fee Related
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JP2008095680A
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English (en)
Japanese (ja)
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JP2008288569A (ja
JP2008288569A5 (https=
Inventor
舜平 山崎
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2008095680A priority Critical patent/JP5305712B2/ja
Publication of JP2008288569A publication Critical patent/JP2008288569A/ja
Publication of JP2008288569A5 publication Critical patent/JP2008288569A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H10P14/6532—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2

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  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
JP2008095680A 2007-04-06 2008-04-02 半導体基板の作製方法 Expired - Fee Related JP5305712B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008095680A JP5305712B2 (ja) 2007-04-06 2008-04-02 半導体基板の作製方法

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2007101181 2007-04-06
JP2007101181 2007-04-06
JP2007109943 2007-04-19
JP2007109943 2007-04-19
JP2008095680A JP5305712B2 (ja) 2007-04-06 2008-04-02 半導体基板の作製方法

Publications (3)

Publication Number Publication Date
JP2008288569A JP2008288569A (ja) 2008-11-27
JP2008288569A5 JP2008288569A5 (https=) 2011-04-14
JP5305712B2 true JP5305712B2 (ja) 2013-10-02

Family

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Family Applications (1)

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JP2008095680A Expired - Fee Related JP5305712B2 (ja) 2007-04-06 2008-04-02 半導体基板の作製方法

Country Status (3)

Country Link
US (1) US20080248629A1 (https=)
EP (1) EP1978554A3 (https=)
JP (1) JP5305712B2 (https=)

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JP5459899B2 (ja) * 2007-06-01 2014-04-02 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7795114B2 (en) * 2007-08-10 2010-09-14 Semiconductor Energy Laboratory Co., Ltd. Manufacturing methods of SOI substrate and semiconductor device
US8314009B2 (en) * 2007-09-14 2012-11-20 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and method for manufacturing semiconductor device
US8067793B2 (en) * 2007-09-27 2011-11-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including storage capacitor with yttrium oxide capacitor dielectric
US8455331B2 (en) * 2007-10-10 2013-06-04 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
JP5511173B2 (ja) * 2007-10-10 2014-06-04 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7816232B2 (en) * 2007-11-27 2010-10-19 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate and semiconductor substrate manufacturing apparatus
US8093136B2 (en) * 2007-12-28 2012-01-10 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP2010239123A (ja) * 2009-03-12 2010-10-21 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法
SG183670A1 (en) * 2009-04-22 2012-09-27 Semiconductor Energy Lab Method of manufacturing soi substrate
KR101702943B1 (ko) * 2010-10-29 2017-02-22 엘지이노텍 주식회사 발광소자의 제조방법
JP2012156495A (ja) 2011-01-07 2012-08-16 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法
US9324449B2 (en) 2012-03-28 2016-04-26 Semiconductor Energy Laboratory Co., Ltd. Driver circuit, signal processing unit having the driver circuit, method for manufacturing the signal processing unit, and display device
US11232975B2 (en) * 2018-09-26 2022-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-on-insulator (SOI) substrate having dielectric structures that increase interface bonding strength
US10950631B1 (en) 2019-09-24 2021-03-16 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor-on-insulator wafer having a composite insulator layer
JP7402112B2 (ja) * 2020-05-08 2023-12-20 信越化学工業株式会社 圧電性単結晶膜を備えた複合基板の製造方法

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JPH10308354A (ja) * 1997-05-08 1998-11-17 Denso Corp 半導体基板の製造方法
US6534380B1 (en) * 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
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JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6271101B1 (en) * 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP4476390B2 (ja) * 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
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JP5326183B2 (ja) 2005-10-14 2013-10-30 澁谷工業株式会社 レーザアニール方法
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Also Published As

Publication number Publication date
US20080248629A1 (en) 2008-10-09
EP1978554A3 (en) 2011-10-12
JP2008288569A (ja) 2008-11-27
EP1978554A2 (en) 2008-10-08

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