JP5250832B2 - アクティブマトリクス駆動表示装置 - Google Patents
アクティブマトリクス駆動表示装置 Download PDFInfo
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- JP5250832B2 JP5250832B2 JP2007180043A JP2007180043A JP5250832B2 JP 5250832 B2 JP5250832 B2 JP 5250832B2 JP 2007180043 A JP2007180043 A JP 2007180043A JP 2007180043 A JP2007180043 A JP 2007180043A JP 5250832 B2 JP5250832 B2 JP 5250832B2
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- 239000011159 matrix material Substances 0.000 title claims description 15
- 239000010408 film Substances 0.000 claims description 136
- 239000000758 substrate Substances 0.000 claims description 35
- 239000004065 semiconductor Substances 0.000 claims description 30
- 229910052751 metal Inorganic materials 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 15
- 239000010409 thin film Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 159
- 238000005530 etching Methods 0.000 description 24
- 239000004973 liquid crystal related substance Substances 0.000 description 18
- 238000000034 method Methods 0.000 description 14
- 238000004519 manufacturing process Methods 0.000 description 13
- 239000004020 conductor Substances 0.000 description 11
- 239000011521 glass Substances 0.000 description 9
- 229910021417 amorphous silicon Inorganic materials 0.000 description 8
- 239000011241 protective layer Substances 0.000 description 8
- 239000002356 single layer Substances 0.000 description 8
- 229910004205 SiNX Inorganic materials 0.000 description 7
- 239000011651 chromium Substances 0.000 description 7
- 238000001039 wet etching Methods 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Description
絶縁性基板上に順次に形成される、ゲート電極層、ゲート絶縁膜、半導体パターン層、及び、ソース/ドレイン電極層を含む薄膜トランジスタを有する、アクティブマトリクス駆動表示装置において、
前記ゲート電極層は、第1の金属層と該第1の金属層上に形成された第2の金属層から構成された積層膜であり、前記ゲート電極層の側面の一部は、上部が下部にオーバーハングする逆テーパ形状を有し、前記ゲート絶縁膜の厚みは前記第1の金属層の厚み以下で、かつ、前記ゲート電極層の側面の一部がオーバーハングする逆テーパ部分までの高さよりも小さく、前記ゲート電極層の配線部分と前記ソース/ドレイン電極層の配線部分との交差部分に、前記ゲート絶縁膜が介在していることを特徴とする。
11:ガラス基板
12:ゲート電極層
12a:ゲート電極
12b:ゲート端子電極
12c:ゲート配線
13:ゲート絶縁膜
14:真性半導体層
15:チャネル
16:オーミック層
17a:ソース電極
17b:ドレイン電極
17c:ドレイン配線
17d:ドレイン端子電極
18:保護層
19:コンタクトホール
20:画素電極
21:コンタクトホール
22:接続電極
23:段差
24:TFT素子
31〜33:側面
34:Al層
35:Mo層
36:レジストマスク
37:(逆テーパ状の)部分
38:(楔状の)部分
39:エッチング残渣
40:窪み
Claims (3)
- 絶縁性基板上に順次に形成される、ゲート電極層、ゲート絶縁膜、半導体パターン層、及び、ソース/ドレイン電極層を含む薄膜トランジスタを有する、アクティブマトリクス駆動表示装置において、
前記ゲート電極層は、第1の金属層と該第1の金属層上に形成された第2の金属層から構成された積層膜であり、前記ゲート電極層の側面の一部は、上部が下部にオーバーハングする逆テーパ形状を有し、前記ゲート絶縁膜の厚みは前記第1の金属層の厚み以下で、かつ、前記ゲート電極層の側面の一部がオーバーハングする逆テーパ部分までの高さよりも小さく、前記ゲート電極層の配線部分と前記ソース/ドレイン電極層の配線部分との交差部分に、前記ゲート絶縁膜が介在していることを特徴とするアクティブマトリクス駆動表示装置。 - 前記ゲート電極層の配線部分と前記ソース/ドレイン電極層の配線部分との交差部分に、前記ゲート絶縁膜上に形成された、前記半導体パターン層と同じ半導体材料からなる半導体層とオーミック層との積層膜が介在していることを特徴とする請求項1に記載のアクティブマトリクス駆動表示装置。
- 前記ゲート電極層の厚みが200nm以上であり、前記ゲート絶縁膜の厚みが前記ゲート電極層の厚みよりも50nm以上小さい、請求項1又は2に記載のアクティブマトリクス駆動表示装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007180043A JP5250832B2 (ja) | 2007-07-09 | 2007-07-09 | アクティブマトリクス駆動表示装置 |
CN2008101361162A CN101345246B (zh) | 2007-07-09 | 2008-07-09 | 包括tft的有源矩阵驱动式显示装置 |
US12/170,067 US7804092B2 (en) | 2007-07-09 | 2008-07-09 | Active-matrix-drive display unit including TFT |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007180043A JP5250832B2 (ja) | 2007-07-09 | 2007-07-09 | アクティブマトリクス駆動表示装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009016756A JP2009016756A (ja) | 2009-01-22 |
JP5250832B2 true JP5250832B2 (ja) | 2013-07-31 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007180043A Active JP5250832B2 (ja) | 2007-07-09 | 2007-07-09 | アクティブマトリクス駆動表示装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7804092B2 (ja) |
JP (1) | JP5250832B2 (ja) |
CN (1) | CN101345246B (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2011108050A1 (ja) * | 2010-03-02 | 2011-09-09 | シャープ株式会社 | 薄膜トランジスタ基板及びその製造方法 |
KR101750430B1 (ko) * | 2010-11-29 | 2017-06-26 | 삼성디스플레이 주식회사 | 박막 트랜지스터 표시판의 제조 방법 |
JP6120340B2 (ja) * | 2013-04-24 | 2017-04-26 | 国立研究開発法人産業技術総合研究所 | 異種材料接合を有する半導体デバイス |
KR102440302B1 (ko) * | 2015-04-13 | 2022-09-05 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 그 제작 방법 |
JP6611521B2 (ja) * | 2015-08-25 | 2019-11-27 | 三菱電機株式会社 | 薄膜トランジスタ及びアレイ基板 |
JP6505857B2 (ja) * | 2015-09-24 | 2019-04-24 | 富士フイルム株式会社 | 有機薄膜トランジスタおよび有機薄膜トランジスタの製造方法 |
US20190140081A1 (en) * | 2017-11-06 | 2019-05-09 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Tft substrate and manufacturing method thereof |
US10937879B2 (en) * | 2017-11-30 | 2021-03-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and manufacturing method thereof |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2564725B2 (ja) * | 1991-12-24 | 1996-12-18 | 株式会社半導体エネルギー研究所 | Mos型トランジスタの作製方法 |
EP1338914A3 (en) * | 1995-11-21 | 2003-11-19 | Samsung Electronics Co., Ltd. | Method for manufacturing liquid crystal display |
JP2985124B2 (ja) | 1997-06-12 | 1999-11-29 | 株式会社日立製作所 | 液晶表示装置 |
JP4831850B2 (ja) * | 1997-07-08 | 2011-12-07 | 株式会社半導体エネルギー研究所 | 薄膜トランジスタの作製方法 |
JP3943245B2 (ja) * | 1997-09-20 | 2007-07-11 | 株式会社半導体エネルギー研究所 | 半導体装置 |
JP2000171834A (ja) * | 1998-10-02 | 2000-06-23 | Hitachi Ltd | 液晶表示装置とその製造方法 |
JP2000305104A (ja) * | 1999-04-19 | 2000-11-02 | Hitachi Ltd | 液晶表示装置及びその製造方法 |
JP2000314897A (ja) * | 1999-05-06 | 2000-11-14 | Hitachi Ltd | 液晶表示装置 |
KR100587363B1 (ko) * | 1999-09-20 | 2006-06-08 | 엘지.필립스 엘시디 주식회사 | 다결정 실리콘 박막트랜지스터의 제조방법 |
JP2001217423A (ja) * | 2000-02-01 | 2001-08-10 | Sony Corp | 薄膜半導体装置及び表示装置とその製造方法 |
JP2001255543A (ja) * | 2000-03-10 | 2001-09-21 | Hitachi Ltd | 液晶表示装置 |
US7223643B2 (en) * | 2000-08-11 | 2007-05-29 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
US6773944B2 (en) * | 2001-11-07 | 2004-08-10 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
US7189993B2 (en) * | 2002-06-07 | 2007-03-13 | Sony Corporation | Display device, method of production of the same, and projection type display device |
US7374981B2 (en) * | 2003-04-11 | 2008-05-20 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor, electronic device having the same, and method for manufacturing the same |
TWI238449B (en) * | 2003-06-06 | 2005-08-21 | Pioneer Corp | Organic semiconductor device and method of manufacture of same |
JP2005197363A (ja) * | 2004-01-05 | 2005-07-21 | Toshiba Corp | 不揮発性半導体メモリセル及びその製造方法 |
US8318554B2 (en) * | 2005-04-28 | 2012-11-27 | Semiconductor Energy Laboratory Co., Ltd. | Method of forming gate insulating film for thin film transistors using plasma oxidation |
US20070296003A1 (en) * | 2006-06-08 | 2007-12-27 | Samsung Electronics Co., Ltd. | Thin Film Transistor Substrate and Method for Manufacturing the Same |
-
2007
- 2007-07-09 JP JP2007180043A patent/JP5250832B2/ja active Active
-
2008
- 2008-07-09 US US12/170,067 patent/US7804092B2/en active Active
- 2008-07-09 CN CN2008101361162A patent/CN101345246B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
CN101345246B (zh) | 2012-12-05 |
JP2009016756A (ja) | 2009-01-22 |
CN101345246A (zh) | 2009-01-14 |
US20090014722A1 (en) | 2009-01-15 |
US7804092B2 (en) | 2010-09-28 |
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Free format text: JAPANESE INTERMEDIATE CODE: R250 |