JP5190225B2 - 半導体装置及びその作製方法 - Google Patents

半導体装置及びその作製方法 Download PDF

Info

Publication number
JP5190225B2
JP5190225B2 JP2007187883A JP2007187883A JP5190225B2 JP 5190225 B2 JP5190225 B2 JP 5190225B2 JP 2007187883 A JP2007187883 A JP 2007187883A JP 2007187883 A JP2007187883 A JP 2007187883A JP 5190225 B2 JP5190225 B2 JP 5190225B2
Authority
JP
Japan
Prior art keywords
insulating film
semiconductor film
film
semiconductor
base substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007187883A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009026917A (ja
JP2009026917A5 (https=
Inventor
秀和 宮入
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2007187883A priority Critical patent/JP5190225B2/ja
Publication of JP2009026917A publication Critical patent/JP2009026917A/ja
Publication of JP2009026917A5 publication Critical patent/JP2009026917A5/ja
Application granted granted Critical
Publication of JP5190225B2 publication Critical patent/JP5190225B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/021—Manufacture or treatment of air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/20—Air gaps

Landscapes

  • Thin Film Transistor (AREA)
JP2007187883A 2007-07-19 2007-07-19 半導体装置及びその作製方法 Expired - Fee Related JP5190225B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007187883A JP5190225B2 (ja) 2007-07-19 2007-07-19 半導体装置及びその作製方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007187883A JP5190225B2 (ja) 2007-07-19 2007-07-19 半導体装置及びその作製方法

Publications (3)

Publication Number Publication Date
JP2009026917A JP2009026917A (ja) 2009-02-05
JP2009026917A5 JP2009026917A5 (https=) 2010-07-08
JP5190225B2 true JP5190225B2 (ja) 2013-04-24

Family

ID=40398463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007187883A Expired - Fee Related JP5190225B2 (ja) 2007-07-19 2007-07-19 半導体装置及びその作製方法

Country Status (1)

Country Link
JP (1) JP5190225B2 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI567985B (zh) * 2011-10-21 2017-01-21 半導體能源研究所股份有限公司 半導體裝置及其製造方法
CN111952238B (zh) * 2020-08-21 2024-06-14 中国科学院上海微系统与信息技术研究所 具有空腔结构的soi衬底及其制备方法
CN111952240B (zh) * 2020-08-21 2024-06-14 中国科学院上海微系统与信息技术研究所 具有纳米级空腔结构的soi衬底及其制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002343977A (ja) * 2002-03-26 2002-11-29 Nec Corp 電界効果型トランジスタ
JP4556158B2 (ja) * 2002-10-22 2010-10-06 株式会社Sumco 貼り合わせｓｏｉ基板の製造方法および半導体装置
JP4794810B2 (ja) * 2003-03-20 2011-10-19 シャープ株式会社 半導体装置の製造方法
JP2008053403A (ja) * 2006-08-24 2008-03-06 Nec Corp 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
JP2009026917A (ja) 2009-02-05

Similar Documents

Publication Publication Date Title
JP5350655B2 (ja) 半導体装置
KR101447936B1 (ko) 반도체 장치 및 그 제작 방법
US7968884B2 (en) Semiconductor device and manufacturing method thereof
CN101409214B (zh) 制造半导体器件的方法
JP5250228B2 (ja) 半導体装置の作製方法
JP5352122B2 (ja) 半導体装置の作製方法
JP5275608B2 (ja) 半導体基板の作製方法
US7692194B2 (en) Semiconductor device
JP5619474B2 (ja) Ｓｏｉ基板の作製方法
JP2009094488A (ja) 半導体膜付き基板の作製方法
JP5268305B2 (ja) 半導体装置の作製方法
US7816234B2 (en) Method for manufacturing semiconductor device
JP2011077504A (ja) 半導体装置の作製方法
JP2009004745A (ja) 半導体装置
JP5190225B2 (ja) 半導体装置及びその作製方法
JP2009194376A (ja) 半導体基板製造装置
JP5255801B2 (ja) 半導体装置の作製方法
JP2008300709A (ja) 半導体装置及びその作製方法
HK1125740A (en) Semiconductor device and method for manufacturing the same

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100521

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100521

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20121121

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20121127

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121224

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130122

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130128

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20160201

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 5190225

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20160201

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees