JP5167267B2 - パッシブ・マトリックス式薄膜エレクトロルミネッセンス・ディスプレイ - Google Patents
パッシブ・マトリックス式薄膜エレクトロルミネッセンス・ディスプレイ Download PDFInfo
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- JP5167267B2 JP5167267B2 JP2009536237A JP2009536237A JP5167267B2 JP 5167267 B2 JP5167267 B2 JP 5167267B2 JP 2009536237 A JP2009536237 A JP 2009536237A JP 2009536237 A JP2009536237 A JP 2009536237A JP 5167267 B2 JP5167267 B2 JP 5167267B2
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3622—Control of matrices with row and column drivers using a passive matrix
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/17—Passive-matrix OLED displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/02—Composition of display devices
- G09G2300/023—Display panel composed of stacked panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/06—Passive matrix structure, i.e. with direct application of both column and row voltages to the light emitting or modulating elements, other than LCD or OLED
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
- G09G2310/0205—Simultaneous scanning of several lines in flat panels
- G09G2310/021—Double addressing, i.e. scanning two or more lines, e.g. lines 2 and 3; 4 and 5, at a time in a first field, followed by scanning two or more lines in another combination, e.g. lines 1 and 2; 3 and 4, in a second field
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/12—Frame memory handling
- G09G2360/123—Frame memory handling using interleaving
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Electroluminescent Light Sources (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Description
4 ディスプレイ
5、5a、5b エレクトロルミネッセンス素子
6 第1の方向
8 第2の方向
10 基板
11 柱
12 第1の電極
13 第1の電極
14 エレクトロルミネッセンス材料層
16 第2の電極
18 第2のエレクトロルミネッセンス材料層
19 第2の基板
20 第2の電極
24 第1の積層
26 第2の積層
40 ドライバ
42 入力信号
44 駆動信号
46 回路
50 ドライバ
52 入力信号
54 駆動信号
56 回路
100 信号受信ステップ
105 信号分解ステップ
110 ディスプレイ駆動ステップ
Claims (5)
- a)i)第1の基板と、
ii)前記第1の基板の第1の方向に沿って複数のラインが形成されるようにパターニングされた第1の電極層と、
iii)前記第1の電極層の上に形成された1つ以上の第1の薄膜エレクトロルミネッセンス層と、
iv)1つ以上の前記第1の薄膜エレクトロルミネッセンス層の上に形成されていて、前記第1の基板の第1の方向とは異なる第2の方向に沿って複数のラインが形成されるようにパターニングされた第2の電極層と、を備えていて、
v)第1の電極層のラインと第2の電極層のラインの交点が、第1のエレクトロルミネッセンス・ユニットを含む個々の発光素子を規定しているディスプレイと、
b)i)前記ディスプレイの前記発光素子にアドレスするための入力画像信号を受け取り、
ii)前記入力画像信号を低解像度成分信号と高解像度成分信号に分解し、前記低解像度成分信号はアドレス可能な場所を前記高解像度成分信号の半数以下含んでいるようにし、
iii)前記ディスプレイを駆動するための駆動信号を供給することにより前記低解像度成分信号と前記高解像度成分信号を前記ディスプレイに独立に供給し、組み合わされた画像を形成する1つ以上のディスプレイ・ドライバと、を備え、
前記第1のエレクトロルミネッセンス・ユニットと重なるようにして配置された第2のエレクトロルミネッセンス・ユニットに含まれる1つ以上の第2の薄膜エレクトロルミネッセンス層、第3の電極層及び第4の電極層をさらに備え、
前記第1のエレクトロルミネッセンス・ユニットは前記低解像度成分信号を用いて第1のリフレッシュ・レートで駆動され、
前記第2のエレクトロルミネッセンス・ユニットは前記高解像度成分信号を用いて第2のリフレッシュ・レートで駆動される、
ことを特徴とするパッシブ・マトリックス式薄膜エレクトロルミネッセンス・ディスプレイ・システム。 - 前記低解像度成分信号が前記ディスプレイに供給されたときに、前記ディスプレイの2つの方向に沿った複数の発光素子がアクティブにされ、前記高解像度成分信号が前記ディスプレイに供給されたときに、前記ディスプレイの1つの方向だけに沿った複数の発光素子がアクティブにされる、請求項1に記載のパッシブ・マトリックス式薄膜エレクトロルミネッセンス・ディスプレイ・システム。
- 前記第1のエレクトロルミネッセンス・ユニット及び前記第2のエレクトロルミネッセンス・ユニットが前記第1の基板のいずれかの面に形成され、
前記第1の基板の第2の面には、前記第3の電極層、前記第2の薄膜エレクトロルミネッセンス層、及び前記第4の電極層が設けられている、請求項1に記載のパッシブ・マトリックス式薄膜エレクトロルミネッセンス・ディスプレイ・システム。 - 前記ディスプレイは第2の基板をさらに備え、
前記第1のエレクトロルミネッセンス・ユニットが、前記第1の基板の上で第1の積層の中に形成されていて前記低解像度成分信号によって駆動され、
前記第2のエレクトロルミネッセンス・ユニットが前記第2の基板の上で第2の積層の中に形成されていて前記高解像度成分信号によって駆動される、請求項1に記載のパッシブ・マトリックス式薄膜エレクトロルミネッセンス・ディスプレイ・システム。 - 前記第1及び第2のエレクトロルミネッセンス・ユニットを互いに積み重ね、前記第2の電極層及び前記第3の電極層を共通電極として共有する、請求項1に記載のパッシブ・マトリックス式薄膜エレクトロルミネッセンス・ディスプレイ・システム。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/558,093 | 2006-11-09 | ||
US11/558,093 US8049685B2 (en) | 2006-11-09 | 2006-11-09 | Passive matrix thin-film electro-luminescent display |
PCT/US2007/022727 WO2008063348A2 (en) | 2006-11-09 | 2007-10-26 | Passive matrix thin-film electro-luminescent display |
Publications (3)
Publication Number | Publication Date |
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JP2010509634A JP2010509634A (ja) | 2010-03-25 |
JP2010509634A5 JP2010509634A5 (ja) | 2010-12-16 |
JP5167267B2 true JP5167267B2 (ja) | 2013-03-21 |
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Application Number | Title | Priority Date | Filing Date |
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JP2009536237A Active JP5167267B2 (ja) | 2006-11-09 | 2007-10-26 | パッシブ・マトリックス式薄膜エレクトロルミネッセンス・ディスプレイ |
Country Status (5)
Country | Link |
---|---|
US (1) | US8049685B2 (ja) |
EP (2) | EP2426659B1 (ja) |
JP (1) | JP5167267B2 (ja) |
KR (1) | KR101249459B1 (ja) |
WO (1) | WO2008063348A2 (ja) |
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-
2006
- 2006-11-09 US US11/558,093 patent/US8049685B2/en active Active
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2007
- 2007-10-26 EP EP11008346.6A patent/EP2426659B1/en active Active
- 2007-10-26 KR KR1020097009411A patent/KR101249459B1/ko active IP Right Grant
- 2007-10-26 WO PCT/US2007/022727 patent/WO2008063348A2/en active Application Filing
- 2007-10-26 JP JP2009536237A patent/JP5167267B2/ja active Active
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EP2092504A2 (en) | 2009-08-26 |
KR20090086212A (ko) | 2009-08-11 |
JP2010509634A (ja) | 2010-03-25 |
EP2426659B1 (en) | 2013-12-11 |
US8049685B2 (en) | 2011-11-01 |
WO2008063348A2 (en) | 2008-05-29 |
KR101249459B1 (ko) | 2013-03-29 |
EP2426659A1 (en) | 2012-03-07 |
WO2008063348A3 (en) | 2008-12-04 |
US20080111771A1 (en) | 2008-05-15 |
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