JP5166576B2 - GaN系半導体素子の製造方法 - Google Patents
GaN系半導体素子の製造方法 Download PDFInfo
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- JP5166576B2 JP5166576B2 JP2011150971A JP2011150971A JP5166576B2 JP 5166576 B2 JP5166576 B2 JP 5166576B2 JP 2011150971 A JP2011150971 A JP 2011150971A JP 2011150971 A JP2011150971 A JP 2011150971A JP 5166576 B2 JP5166576 B2 JP 5166576B2
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- 239000004065 semiconductor Substances 0.000 title claims description 33
- 238000004519 manufacturing process Methods 0.000 title claims description 31
- 230000001681 protective effect Effects 0.000 claims description 89
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 46
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 46
- 230000015572 biosynthetic process Effects 0.000 claims description 14
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 10
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- 229910052735 hafnium Inorganic materials 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 74
- 229910002704 AlGaN Inorganic materials 0.000 description 33
- 238000000034 method Methods 0.000 description 29
- 230000004888 barrier function Effects 0.000 description 26
- 238000010438 heat treatment Methods 0.000 description 26
- 230000008569 process Effects 0.000 description 18
- 239000002184 metal Substances 0.000 description 17
- 229910052751 metal Inorganic materials 0.000 description 17
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 15
- 229920002120 photoresistant polymer Polymers 0.000 description 13
- 238000000137 annealing Methods 0.000 description 12
- 238000000206 photolithography Methods 0.000 description 8
- 239000000758 substrate Substances 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 238000001312 dry etching Methods 0.000 description 6
- 238000001039 wet etching Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 4
- 230000005669 field effect Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 230000001629 suppression Effects 0.000 description 3
- 230000005533 two-dimensional electron gas Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 229910016570 AlCu Inorganic materials 0.000 description 1
- 229910000789 Aluminium-silicon alloy Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
Description
上記保護膜を熱処理し、
上記保護膜および上記GaN系積層体のうちの少なくとも上記保護膜の予め定められた領域をエッチングで除去して上記GaN系積層体のオーミック電極形成領域を露出させ、
上記GaN系積層体のオーミック電極形成領域にTi/AlまたはHf/Alを含む電極を形成し、
上記電極を熱処理してオーミック電極にするGaN系半導体素子の製造方法であり、
上記保護膜は、
上記GaN系積層体上に形成された下層シリコン窒化膜と、
上記下層シリコン窒化膜上に形成された上層シリコン窒化膜と、
上記上層シリコン窒化膜上に形成されたSiO 2 膜またはAl 2 O 3 膜と
を有し、
上記上層シリコン窒化膜は、ストイキオメトリなシリコン窒化膜であることを特徴としている。
上記GaN系積層体上に形成された下層シリコン窒化膜と、
上記下層シリコン窒化膜上に形成された上層シリコン窒化膜と、
上記上層シリコン窒化膜上に形成されたSiO2膜またはAl2O3膜と
を有し、
上記上層シリコン窒化膜は、ストイキオメトリなシリコン窒化膜である。
図1〜図5は、この発明の第1実施形態であるGaN系HFET(Hetero-junction Field Effect Transistor;ヘテロ接合電界効果トランジスタ)の製造方法の工程を順に示す断面図である。
次に、図9〜図13は、この発明の第2実施形態であるGaN系HFETの製造方法の工程を順に示す断面図である。
2,72 アンドープAlGaNバッファ層
3,73 GaNチャネル層
4,74 AlGaNバリア層
5,75 GaN系積層体
6,76 2次元電子ガス
7,77 SiN保護膜
10,11,70,71 開口
12,13 リセス
15,85 Ti/Al電極(ソース電極)
16,86 Ti/Al電極(ドレイン電極)
18,88 ゲート電極
20,90 開口
50 保護膜
51 下層SiN膜
52 上層SiN膜
53 SiO2膜
Claims (2)
- ヘテロ接合を有するGaN系積層体上にシリコン窒化膜を含む保護膜またはシリコン窒化膜からなる保護膜を形成し、
上記保護膜を熱処理し、
上記保護膜および上記GaN系積層体のうちの少なくとも上記保護膜の予め定められた領域をエッチングで除去して上記GaN系積層体のオーミック電極形成領域を露出させ、
上記GaN系積層体のオーミック電極形成領域にTi/AlまたはHf/Alを含む電極を形成し、
上記電極を熱処理してオーミック電極にするGaN系半導体素子の製造方法であり、
上記保護膜は、
上記GaN系積層体上に形成された下層シリコン窒化膜と、
上記下層シリコン窒化膜上に形成された上層シリコン窒化膜と、
上記上層シリコン窒化膜上に形成されたSiO2膜またはAl2O3膜と
を有し、
上記上層シリコン窒化膜は、ストイキオメトリなシリコン窒化膜であることを特徴とするGaN系半導体素子の製造方法。 - 請求項1に記載のGaN系半導体素子の製造方法において、
上記電極を熱処理する温度を、上記保護膜を熱処理する温度よりも低くしたことを特徴とするGaN系半導体素子の製造方法。
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JP2011150971A JP5166576B2 (ja) | 2011-07-07 | 2011-07-07 | GaN系半導体素子の製造方法 |
PCT/JP2012/066677 WO2013005667A1 (ja) | 2011-07-07 | 2012-06-29 | GaN系半導体素子の製造方法 |
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JP2013021016A JP2013021016A (ja) | 2013-01-31 |
JP5166576B2 true JP5166576B2 (ja) | 2013-03-21 |
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US8150519B2 (en) | 2002-04-08 | 2012-04-03 | Ardian, Inc. | Methods and apparatus for bilateral renal neuromodulation |
TWI556849B (zh) | 2010-10-21 | 2016-11-11 | 美敦力阿福盧森堡公司 | 用於腎臟神經協調的導管裝置 |
EP2632378B1 (en) | 2010-10-25 | 2018-10-17 | Medtronic Ardian Luxembourg S.à.r.l. | Catheter apparatuses having multi-electrode arrays for renal neuromodulation and associated systems |
MX2014013323A (es) | 2012-05-11 | 2015-01-22 | Medtronic Ardian Luxembourg | Ensamblajes de cateter de multiples electrodos para neuromodulacion renal y sistemas y metodos asociados. |
KR102087941B1 (ko) * | 2013-08-07 | 2020-03-11 | 엘지이노텍 주식회사 | 전력 반도체 소자 |
JP2015170824A (ja) * | 2014-03-10 | 2015-09-28 | 株式会社東芝 | 半導体装置及びその製造方法 |
KR20180068161A (ko) * | 2016-12-13 | 2018-06-21 | (주)웨이비스 | 질화물계 전자소자 및 그 제조방법 |
JP2018163928A (ja) * | 2017-03-24 | 2018-10-18 | 住友電気工業株式会社 | 半導体装置の製造方法 |
JP6888224B2 (ja) * | 2017-10-16 | 2021-06-16 | 住友電工デバイス・イノベーション株式会社 | 半導体装置の製造方法 |
KR102396072B1 (ko) * | 2020-11-13 | 2022-05-11 | 한국원자력연구원 | GaN계 전자 소자의 오믹 접촉 형성 방법 및 이에 따라 제조된 GaN계 전자 소자의 오믹 접촉 |
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JP2008016762A (ja) * | 2006-07-10 | 2008-01-24 | Oki Electric Ind Co Ltd | GaN−HEMTの製造方法 |
JP2008306026A (ja) * | 2007-06-08 | 2008-12-18 | Eudyna Devices Inc | 半導体装置の製造方法 |
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