JP5139059B2 - プラズマ処理システムにおけるエッチング耐性を最適にする方法 - Google Patents

プラズマ処理システムにおけるエッチング耐性を最適にする方法 Download PDF

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JP5139059B2
JP5139059B2 JP2007519252A JP2007519252A JP5139059B2 JP 5139059 B2 JP5139059 B2 JP 5139059B2 JP 2007519252 A JP2007519252 A JP 2007519252A JP 2007519252 A JP2007519252 A JP 2007519252A JP 5139059 B2 JP5139059 B2 JP 5139059B2
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Prior art keywords
plasma processing
plasma
etching
substrate
photoresist
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Japanese (ja)
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JP2008505490A5 (enExample
JP2008505490A (ja
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アダムス,ヨーコ,ヤマグチ
ストヤコビック,ジョージ
ミラー,アラン
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Lam Research Corp
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Lam Research Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32798Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32853Hygiene
    • H01J37/32862In situ cleaning of vessels and/or internal parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Epidemiology (AREA)
  • Public Health (AREA)
  • Drying Of Semiconductors (AREA)
JP2007519252A 2004-06-30 2005-06-14 プラズマ処理システムにおけるエッチング耐性を最適にする方法 Expired - Lifetime JP5139059B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/883,282 2004-06-30
US10/883,282 US7316785B2 (en) 2004-06-30 2004-06-30 Methods and apparatus for the optimization of etch resistance in a plasma processing system
PCT/US2005/021047 WO2006011996A2 (en) 2004-06-30 2005-06-14 Methods and apparatus for the optimization of etch resistance in a plasma processing system

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012199346A Division JP5567084B2 (ja) 2004-06-30 2012-09-11 プラズマ処理システムにおけるエッチング耐性を最適にする方法

Publications (3)

Publication Number Publication Date
JP2008505490A JP2008505490A (ja) 2008-02-21
JP2008505490A5 JP2008505490A5 (enExample) 2008-07-03
JP5139059B2 true JP5139059B2 (ja) 2013-02-06

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JP2007519252A Expired - Lifetime JP5139059B2 (ja) 2004-06-30 2005-06-14 プラズマ処理システムにおけるエッチング耐性を最適にする方法
JP2012199346A Expired - Lifetime JP5567084B2 (ja) 2004-06-30 2012-09-11 プラズマ処理システムにおけるエッチング耐性を最適にする方法

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JP2012199346A Expired - Lifetime JP5567084B2 (ja) 2004-06-30 2012-09-11 プラズマ処理システムにおけるエッチング耐性を最適にする方法

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Country Link
US (1) US7316785B2 (enExample)
JP (2) JP5139059B2 (enExample)
KR (1) KR101233453B1 (enExample)
CN (1) CN101263092A (enExample)
TW (1) TWI389196B (enExample)
WO (1) WO2006011996A2 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8546264B2 (en) * 2005-06-02 2013-10-01 The Regents Of The University Of California Etching radical controlled gas chopped deep reactive ion etching
US7906032B2 (en) * 2006-03-31 2011-03-15 Tokyo Electron Limited Method for conditioning a process chamber
CN101809721B (zh) * 2007-09-27 2013-03-06 朗姆研究公司 电介质蚀刻中的形貌控制
US8298958B2 (en) 2008-07-17 2012-10-30 Lam Research Corporation Organic line width roughness with H2 plasma treatment
CN101930921B (zh) * 2009-06-25 2012-09-26 中芯国际集成电路制造(上海)有限公司 提高栅极尺寸均匀性的方法
JP5450187B2 (ja) * 2010-03-16 2014-03-26 株式会社日立ハイテクノロジーズ プラズマ処理装置およびプラズマ処理方法
JP2012015343A (ja) * 2010-07-01 2012-01-19 Hitachi High-Technologies Corp プラズマエッチング方法
TWI458011B (zh) * 2010-10-29 2014-10-21 Macronix Int Co Ltd 蝕刻多層硬式幕罩的方法
US8420947B2 (en) 2010-12-30 2013-04-16 Globalfoundries Singapore Pte. Ltd. Integrated circuit system with ultra-low k dielectric and method of manufacture thereof
JP5956933B2 (ja) 2013-01-15 2016-07-27 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
US9412606B2 (en) * 2014-02-14 2016-08-09 Taiwan Semiconductor Manufacturing Company Limited Target dimension uniformity for semiconductor wafers
JP6169666B2 (ja) * 2015-10-20 2017-07-26 株式会社日立ハイテクノロジーズ プラズマ処理方法
JP6568457B2 (ja) * 2015-11-11 2019-08-28 株式会社日立ハイテクノロジーズ プラズマ処理方法
US9941123B1 (en) * 2017-04-10 2018-04-10 Lam Research Corporation Post etch treatment to prevent pattern collapse
US11532484B2 (en) * 2018-10-26 2022-12-20 Hitachi High-Tech Corporation Plasma processing apparatus and plasma processing method
JPWO2024172018A1 (enExample) 2023-02-13 2024-08-22

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0394597A1 (en) * 1989-04-28 1990-10-31 International Business Machines Corporation Follow-up System for Monitoring the Etching Process in an RIE Equipment and its Application to Producing High-resolution and Reproducible Patterns
JPH0828348B2 (ja) * 1991-02-07 1996-03-21 ヤマハ株式会社 ドライエッチング方法
JPH04313223A (ja) * 1991-04-04 1992-11-05 Mitsubishi Electric Corp 半導体装置の製造方法
US5482749A (en) 1993-06-28 1996-01-09 Applied Materials, Inc. Pretreatment process for treating aluminum-bearing surfaces of deposition chamber prior to deposition of tungsten silicide coating on substrate therein
US5571576A (en) 1995-02-10 1996-11-05 Watkins-Johnson Method of forming a fluorinated silicon oxide layer using plasma chemical vapor deposition
JP3067576B2 (ja) * 1995-03-17 2000-07-17 株式会社日立製作所 プラズマエッチング方法
US5647953A (en) 1995-12-22 1997-07-15 Lam Research Corporation Plasma cleaning method for removing residues in a plasma process chamber
US6071573A (en) * 1997-12-30 2000-06-06 Lam Research Corporation Process for precoating plasma CVD reactors
TW440952B (en) * 1999-07-12 2001-06-16 Lam Res Co Ltd Waferless clean process of dry etcher
US6274500B1 (en) 1999-10-12 2001-08-14 Chartered Semiconductor Manufacturing Ltd. Single wafer in-situ dry clean and seasoning for plasma etching process
US6451703B1 (en) 2000-03-10 2002-09-17 Applied Materials, Inc. Magnetically enhanced plasma etch process using a heavy fluorocarbon etching gas
US6420274B1 (en) 2000-05-10 2002-07-16 International Business Machines Corporation Method for conditioning process chambers
JP2002025977A (ja) * 2000-07-06 2002-01-25 Hitachi Ltd ドライエッチング方法
JP2002184754A (ja) * 2000-12-13 2002-06-28 Seiko Epson Corp ドライエッチング装置のシーズニング方法
US6626187B2 (en) 2001-02-07 2003-09-30 Promos Technologies Inc. Method of reconditioning reaction chamber
US6455333B1 (en) 2001-02-28 2002-09-24 Advanced Micro Devices, Inc. Method of achieving stable deep ultraviolet (DUV) resist etch rate for gate critical dimension (CD)
JP2002270584A (ja) * 2001-03-08 2002-09-20 Toshiba Corp 半導体装置の製造方法
JP2002319571A (ja) * 2001-04-20 2002-10-31 Kawasaki Microelectronics Kk エッチング槽の前処理方法及び半導体装置の製造方法
JP4322484B2 (ja) * 2002-08-30 2009-09-02 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
JP4034164B2 (ja) * 2002-10-28 2008-01-16 富士通株式会社 微細パターンの作製方法及び半導体装置の製造方法
US20040110388A1 (en) * 2002-12-06 2004-06-10 International Business Machines Corporation Apparatus and method for shielding a wafer from charged particles during plasma etching
US6869542B2 (en) * 2003-03-12 2005-03-22 International Business Machines Corporation Hard mask integrated etch process for patterning of silicon oxide and other dielectric materials

Also Published As

Publication number Publication date
WO2006011996A2 (en) 2006-02-02
WO2006011996A3 (en) 2007-04-19
JP2012253386A (ja) 2012-12-20
JP5567084B2 (ja) 2014-08-06
KR20070033010A (ko) 2007-03-23
TWI389196B (zh) 2013-03-11
US7316785B2 (en) 2008-01-08
JP2008505490A (ja) 2008-02-21
CN101263092A (zh) 2008-09-10
KR101233453B1 (ko) 2013-02-14
TW200614369A (en) 2006-05-01
US20060000797A1 (en) 2006-01-05

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