CN101263092A - 在等离子体处理系统中优化抗蚀能力的方法和装置 - Google Patents

在等离子体处理系统中优化抗蚀能力的方法和装置 Download PDF

Info

Publication number
CN101263092A
CN101263092A CNA2005800276665A CN200580027666A CN101263092A CN 101263092 A CN101263092 A CN 101263092A CN A2005800276665 A CNA2005800276665 A CN A2005800276665A CN 200580027666 A CN200580027666 A CN 200580027666A CN 101263092 A CN101263092 A CN 101263092A
Authority
CN
China
Prior art keywords
gas mixture
plasma
precoat
plasma processing
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2005800276665A
Other languages
English (en)
Chinese (zh)
Inventor
山口叶子
乔治·斯托亚科维奇
艾伦·米勒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lam Research Corp
Original Assignee
Lam Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Research Corp filed Critical Lam Research Corp
Publication of CN101263092A publication Critical patent/CN101263092A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32853—Hygiene
    • H01J37/32862—In situ cleaning of vessels and/or internal parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Epidemiology (AREA)
  • Public Health (AREA)
  • Drying Of Semiconductors (AREA)
CNA2005800276665A 2004-06-30 2005-06-14 在等离子体处理系统中优化抗蚀能力的方法和装置 Pending CN101263092A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/883,282 2004-06-30
US10/883,282 US7316785B2 (en) 2004-06-30 2004-06-30 Methods and apparatus for the optimization of etch resistance in a plasma processing system

Publications (1)

Publication Number Publication Date
CN101263092A true CN101263092A (zh) 2008-09-10

Family

ID=35512818

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2005800276665A Pending CN101263092A (zh) 2004-06-30 2005-06-14 在等离子体处理系统中优化抗蚀能力的方法和装置

Country Status (6)

Country Link
US (1) US7316785B2 (enExample)
JP (2) JP5139059B2 (enExample)
KR (1) KR101233453B1 (enExample)
CN (1) CN101263092A (enExample)
TW (1) TWI389196B (enExample)
WO (1) WO2006011996A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI458011B (zh) * 2010-10-29 2014-10-21 Macronix Int Co Ltd 蝕刻多層硬式幕罩的方法

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8546264B2 (en) * 2005-06-02 2013-10-01 The Regents Of The University Of California Etching radical controlled gas chopped deep reactive ion etching
US7906032B2 (en) * 2006-03-31 2011-03-15 Tokyo Electron Limited Method for conditioning a process chamber
KR101528947B1 (ko) * 2007-09-27 2015-06-15 램 리써치 코포레이션 유전체 에칭에서의 프로파일 제어
US8298958B2 (en) 2008-07-17 2012-10-30 Lam Research Corporation Organic line width roughness with H2 plasma treatment
CN101930921B (zh) * 2009-06-25 2012-09-26 中芯国际集成电路制造(上海)有限公司 提高栅极尺寸均匀性的方法
JP5450187B2 (ja) * 2010-03-16 2014-03-26 株式会社日立ハイテクノロジーズ プラズマ処理装置およびプラズマ処理方法
JP2012015343A (ja) * 2010-07-01 2012-01-19 Hitachi High-Technologies Corp プラズマエッチング方法
US8420947B2 (en) 2010-12-30 2013-04-16 Globalfoundries Singapore Pte. Ltd. Integrated circuit system with ultra-low k dielectric and method of manufacture thereof
JP5956933B2 (ja) 2013-01-15 2016-07-27 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
US9412606B2 (en) * 2014-02-14 2016-08-09 Taiwan Semiconductor Manufacturing Company Limited Target dimension uniformity for semiconductor wafers
JP6169666B2 (ja) * 2015-10-20 2017-07-26 株式会社日立ハイテクノロジーズ プラズマ処理方法
JP6568457B2 (ja) * 2015-11-11 2019-08-28 株式会社日立ハイテクノロジーズ プラズマ処理方法
US9941123B1 (en) * 2017-04-10 2018-04-10 Lam Research Corporation Post etch treatment to prevent pattern collapse
KR102314450B1 (ko) * 2018-10-26 2021-10-19 주식회사 히타치하이테크 플라스마 처리 장치 및 플라스마 처리 방법
WO2024172018A1 (ja) 2023-02-13 2024-08-22 東京エレクトロン株式会社 プラズマ処理方法、プリコートの形成方法及びプラズマ処理装置

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0394597A1 (en) * 1989-04-28 1990-10-31 International Business Machines Corporation Follow-up System for Monitoring the Etching Process in an RIE Equipment and its Application to Producing High-resolution and Reproducible Patterns
JPH0828348B2 (ja) * 1991-02-07 1996-03-21 ヤマハ株式会社 ドライエッチング方法
JPH04313223A (ja) * 1991-04-04 1992-11-05 Mitsubishi Electric Corp 半導体装置の製造方法
US5482749A (en) 1993-06-28 1996-01-09 Applied Materials, Inc. Pretreatment process for treating aluminum-bearing surfaces of deposition chamber prior to deposition of tungsten silicide coating on substrate therein
US5571576A (en) 1995-02-10 1996-11-05 Watkins-Johnson Method of forming a fluorinated silicon oxide layer using plasma chemical vapor deposition
JP3067576B2 (ja) * 1995-03-17 2000-07-17 株式会社日立製作所 プラズマエッチング方法
US5647953A (en) 1995-12-22 1997-07-15 Lam Research Corporation Plasma cleaning method for removing residues in a plasma process chamber
US6071573A (en) * 1997-12-30 2000-06-06 Lam Research Corporation Process for precoating plasma CVD reactors
TW440952B (en) * 1999-07-12 2001-06-16 Lam Res Co Ltd Waferless clean process of dry etcher
US6274500B1 (en) 1999-10-12 2001-08-14 Chartered Semiconductor Manufacturing Ltd. Single wafer in-situ dry clean and seasoning for plasma etching process
US6451703B1 (en) 2000-03-10 2002-09-17 Applied Materials, Inc. Magnetically enhanced plasma etch process using a heavy fluorocarbon etching gas
US6420274B1 (en) 2000-05-10 2002-07-16 International Business Machines Corporation Method for conditioning process chambers
JP2002025977A (ja) * 2000-07-06 2002-01-25 Hitachi Ltd ドライエッチング方法
JP2002184754A (ja) * 2000-12-13 2002-06-28 Seiko Epson Corp ドライエッチング装置のシーズニング方法
US6626187B2 (en) 2001-02-07 2003-09-30 Promos Technologies Inc. Method of reconditioning reaction chamber
US6455333B1 (en) 2001-02-28 2002-09-24 Advanced Micro Devices, Inc. Method of achieving stable deep ultraviolet (DUV) resist etch rate for gate critical dimension (CD)
JP2002270584A (ja) * 2001-03-08 2002-09-20 Toshiba Corp 半導体装置の製造方法
JP2002319571A (ja) * 2001-04-20 2002-10-31 Kawasaki Microelectronics Kk エッチング槽の前処理方法及び半導体装置の製造方法
JP4322484B2 (ja) * 2002-08-30 2009-09-02 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
JP4034164B2 (ja) * 2002-10-28 2008-01-16 富士通株式会社 微細パターンの作製方法及び半導体装置の製造方法
US20040110388A1 (en) * 2002-12-06 2004-06-10 International Business Machines Corporation Apparatus and method for shielding a wafer from charged particles during plasma etching
US6869542B2 (en) * 2003-03-12 2005-03-22 International Business Machines Corporation Hard mask integrated etch process for patterning of silicon oxide and other dielectric materials

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI458011B (zh) * 2010-10-29 2014-10-21 Macronix Int Co Ltd 蝕刻多層硬式幕罩的方法

Also Published As

Publication number Publication date
US20060000797A1 (en) 2006-01-05
JP5139059B2 (ja) 2013-02-06
US7316785B2 (en) 2008-01-08
TW200614369A (en) 2006-05-01
JP2008505490A (ja) 2008-02-21
JP2012253386A (ja) 2012-12-20
WO2006011996A2 (en) 2006-02-02
TWI389196B (zh) 2013-03-11
KR20070033010A (ko) 2007-03-23
JP5567084B2 (ja) 2014-08-06
WO2006011996A3 (en) 2007-04-19
KR101233453B1 (ko) 2013-02-14

Similar Documents

Publication Publication Date Title
JP5567084B2 (ja) プラズマ処理システムにおけるエッチング耐性を最適にする方法
US9269587B2 (en) Methods for etching materials using synchronized RF pulses
US6322714B1 (en) Process for etching silicon-containing material on substrates
US6074959A (en) Method manifesting a wide process window and using hexafluoropropane or other hydrofluoropropanes to selectively etch oxide
US5980768A (en) Methods and apparatus for removing photoresist mask defects in a plasma reactor
JP2915807B2 (ja) 六弗化イオウ、臭化水素及び酸素を用いる珪化モリブデンのエッチング
CN111627807A (zh) 等离子处理方法以及等离子处理装置
WO1999016110A2 (en) Plasma process for selectively etching oxide using fluoropropane or fluoropropylene
KR20160055877A (ko) 주기적 에칭 프로세스를 이용하여 에칭 스톱 층을 에칭하기 위한 방법들
US7648914B2 (en) Method for etching having a controlled distribution of process results
KR20040090931A (ko) 전계효과 트랜지스터의 게이트 구조를 제조하는 방법
US20050064714A1 (en) Method for controlling critical dimensions during an etch process
US6955964B2 (en) Formation of a double gate structure
US20190362983A1 (en) Systems and methods for etching oxide nitride stacks
US20040018739A1 (en) Methods for etching using building blocks
US6410451B2 (en) Techniques for improving etching in a plasma processing chamber
US20040152331A1 (en) Process for etching polysilicon gates with good mask selectivity, critical dimension control, and cleanliness
US6877517B2 (en) Plasma etch method for forming plasma etched silicon layer
US8709951B2 (en) Implementing state-of-the-art gate transistor, sidewall profile/angle control by tuning gate etch process recipe parameters
US10937662B2 (en) Method of isotropic etching of silicon oxide utilizing fluorocarbon chemistry
WO2020215183A1 (en) Methods for etching a material layer for semiconductor applications
EP1166342A1 (en) Etch and ash photoresist removal process
KR100505423B1 (ko) 워드라인 형성 방법
JP2000156404A (ja) 素子分離エッチング方法
JP2006261216A (ja) 半導体装置の形成方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C12 Rejection of a patent application after its publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20080910