JP5134194B2 - 部品内蔵デバイス及び製造方法 - Google Patents
部品内蔵デバイス及び製造方法 Download PDFInfo
- Publication number
- JP5134194B2 JP5134194B2 JP2005208501A JP2005208501A JP5134194B2 JP 5134194 B2 JP5134194 B2 JP 5134194B2 JP 2005208501 A JP2005208501 A JP 2005208501A JP 2005208501 A JP2005208501 A JP 2005208501A JP 5134194 B2 JP5134194 B2 JP 5134194B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- component
- chip
- substrate
- built
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/25—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
- H01L2224/251—Disposition
- H01L2224/2518—Disposition being disposed on at least two different sides of the body, e.g. dual array
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005208501A JP5134194B2 (ja) | 2005-07-19 | 2005-07-19 | 部品内蔵デバイス及び製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005208501A JP5134194B2 (ja) | 2005-07-19 | 2005-07-19 | 部品内蔵デバイス及び製造方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2007027472A JP2007027472A (ja) | 2007-02-01 |
JP2007027472A5 JP2007027472A5 (enrdf_load_stackoverflow) | 2008-09-04 |
JP5134194B2 true JP5134194B2 (ja) | 2013-01-30 |
Family
ID=37787835
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005208501A Expired - Fee Related JP5134194B2 (ja) | 2005-07-19 | 2005-07-19 | 部品内蔵デバイス及び製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5134194B2 (enrdf_load_stackoverflow) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010101163A1 (ja) * | 2009-03-04 | 2010-09-10 | 日本電気株式会社 | 機能素子内蔵基板及びそれを用いた電子デバイス |
JP5581830B2 (ja) * | 2010-06-11 | 2014-09-03 | 富士通株式会社 | 部品内蔵基板の製造方法及び部品内蔵基板 |
JP2013038230A (ja) * | 2011-08-08 | 2013-02-21 | Fujikura Ltd | 部品内蔵基板およびその製造方法 |
CN117652015A (zh) * | 2021-05-30 | 2024-03-05 | 邦德泰克株式会社 | 半导体基板接合体及其制造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4547728B2 (ja) * | 1999-03-29 | 2010-09-22 | ソニー株式会社 | 半導体装置及びその製造方法 |
JP3813402B2 (ja) * | 2000-01-31 | 2006-08-23 | 新光電気工業株式会社 | 半導体装置の製造方法 |
JP4401070B2 (ja) * | 2002-02-05 | 2010-01-20 | ソニー株式会社 | 半導体装置内蔵多層配線基板及びその製造方法 |
US6790775B2 (en) * | 2002-10-31 | 2004-09-14 | Hewlett-Packard Development Company, L.P. | Method of forming a through-substrate interconnect |
JP2004172412A (ja) * | 2002-11-20 | 2004-06-17 | Kyocera Corp | コンデンサ素子およびコンデンサ素子内蔵多層配線基板 |
JP3956851B2 (ja) * | 2003-01-21 | 2007-08-08 | 凸版印刷株式会社 | 受動素子内蔵基板及びその製造方法 |
JP3740469B2 (ja) * | 2003-01-31 | 2006-02-01 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
JP4634045B2 (ja) * | 2003-07-31 | 2011-02-16 | 富士通株式会社 | 半導体装置の製造方法、貫通電極の形成方法、半導体装置、複合半導体装置、及び実装構造体 |
-
2005
- 2005-07-19 JP JP2005208501A patent/JP5134194B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2007027472A (ja) | 2007-02-01 |
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