JP5114881B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP5114881B2 JP5114881B2 JP2006186460A JP2006186460A JP5114881B2 JP 5114881 B2 JP5114881 B2 JP 5114881B2 JP 2006186460 A JP2006186460 A JP 2006186460A JP 2006186460 A JP2006186460 A JP 2006186460A JP 5114881 B2 JP5114881 B2 JP 5114881B2
- Authority
- JP
- Japan
- Prior art keywords
- gate electrode
- gate
- film
- misfet
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/792—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising applied insulating layers, e.g. stress liners
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01318—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
- H10D64/0132—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN the conductor being a metallic silicide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0135—Manufacturing their gate conductors
- H10D84/0137—Manufacturing their gate conductors the gate conductors being silicided
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0135—Manufacturing their gate conductors
- H10D84/0142—Manufacturing their gate conductors the gate conductors having different shapes or dimensions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006186460A JP5114881B2 (ja) | 2005-07-26 | 2006-07-06 | 半導体装置及びその製造方法 |
| US11/492,199 US7977194B2 (en) | 2005-07-26 | 2006-07-25 | Method for fabricating semiconductor device with fully silicided gate electrode |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005215479 | 2005-07-26 | ||
| JP2005215479 | 2005-07-26 | ||
| JP2006186460A JP5114881B2 (ja) | 2005-07-26 | 2006-07-06 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007059881A JP2007059881A (ja) | 2007-03-08 |
| JP2007059881A5 JP2007059881A5 (https=) | 2009-07-02 |
| JP5114881B2 true JP5114881B2 (ja) | 2013-01-09 |
Family
ID=37694892
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006186460A Expired - Fee Related JP5114881B2 (ja) | 2005-07-26 | 2006-07-06 | 半導体装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7977194B2 (https=) |
| JP (1) | JP5114881B2 (https=) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8008144B2 (en) | 2006-05-11 | 2011-08-30 | Micron Technology, Inc. | Dual work function recessed access device and methods of forming |
| US20070262395A1 (en) | 2006-05-11 | 2007-11-15 | Gibbons Jasper S | Memory cell access devices and methods of making the same |
| US8860174B2 (en) * | 2006-05-11 | 2014-10-14 | Micron Technology, Inc. | Recessed antifuse structures and methods of making the same |
| JP2008140854A (ja) * | 2006-11-30 | 2008-06-19 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP5003515B2 (ja) * | 2007-03-20 | 2012-08-15 | ソニー株式会社 | 半導体装置 |
| JP2008288364A (ja) | 2007-05-17 | 2008-11-27 | Sony Corp | 半導体装置および半導体装置の製造方法 |
| US7867835B2 (en) * | 2008-02-29 | 2011-01-11 | Chartered Semiconductor Manufacturing Ltd. | Integrated circuit system for suppressing short channel effects |
| JP2009277849A (ja) * | 2008-05-14 | 2009-11-26 | Toshiba Corp | 半導体装置及びその製造方法 |
| US7824986B2 (en) * | 2008-11-05 | 2010-11-02 | Micron Technology, Inc. | Methods of forming a plurality of transistor gates, and methods of forming a plurality of transistor gates having at least two different work functions |
| US8779551B2 (en) * | 2012-06-06 | 2014-07-15 | International Business Machines Corporation | Gated diode structure for eliminating RIE damage from cap removal |
| JP6022377B2 (ja) * | 2013-02-28 | 2016-11-09 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| CN104979198B (zh) * | 2014-04-02 | 2018-03-30 | 中芯国际集成电路制造(上海)有限公司 | 鳍式场效应晶体管的形成方法 |
Family Cites Families (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5194749A (en) | 1987-11-30 | 1993-03-16 | Hitachi, Ltd. | Semiconductor integrated circuit device |
| JP2621805B2 (ja) * | 1994-07-30 | 1997-06-18 | 日本電気株式会社 | 半導体装置の製造方法 |
| JP2848481B2 (ja) | 1995-02-08 | 1999-01-20 | 日本電気株式会社 | 半導体装置の製造方法 |
| JP3719618B2 (ja) * | 1996-06-17 | 2005-11-24 | 松下電器産業株式会社 | 半導体装置及びその製造方法 |
| JP3287403B2 (ja) * | 1999-02-19 | 2002-06-04 | 日本電気株式会社 | Mis型電界効果トランジスタ及びその製造方法 |
| JP2000269458A (ja) * | 1999-03-17 | 2000-09-29 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP3746669B2 (ja) * | 2000-10-17 | 2006-02-15 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| US6562718B1 (en) | 2000-12-06 | 2003-05-13 | Advanced Micro Devices, Inc. | Process for forming fully silicided gates |
| JP2002217410A (ja) * | 2001-01-16 | 2002-08-02 | Hitachi Ltd | 半導体装置 |
| JP2003229568A (ja) * | 2002-02-04 | 2003-08-15 | Hitachi Ltd | 半導体装置の製造方法および半導体装置 |
| DE10208164B4 (de) * | 2002-02-26 | 2006-01-12 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Steuern einer elektrischen Eigenschaft eines Feldeffekttransistors |
| JP4173672B2 (ja) | 2002-03-19 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
| JP3634320B2 (ja) * | 2002-03-29 | 2005-03-30 | 株式会社東芝 | 半導体装置及び半導体装置の製造方法 |
| US7235835B2 (en) * | 2002-05-14 | 2007-06-26 | Sony Corporation | Semiconductor device and its manufacturing method, and electronic device |
| DE10234931A1 (de) * | 2002-07-31 | 2004-02-26 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung eines Metallsilizidgates in einer standardmässigen MOS-Prozesssequenz |
| JP2004315211A (ja) * | 2003-04-18 | 2004-11-11 | Tsubakimoto Chain Co | ハイブリッド駆動式コンベヤ |
| JP4557508B2 (ja) * | 2003-06-16 | 2010-10-06 | パナソニック株式会社 | 半導体装置 |
| US20050156208A1 (en) * | 2003-09-30 | 2005-07-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Device having multiple silicide types and a method for its fabrication |
| EP1692717A4 (en) * | 2003-12-08 | 2008-04-09 | Ibm | REDUCTION OF BORDIFFUSIVITY IN PFETS |
| US6929992B1 (en) * | 2003-12-17 | 2005-08-16 | Advanced Micro Devices, Inc. | Strained silicon MOSFETs having NMOS gates with work functions for compensating NMOS threshold voltage shift |
| JP4457688B2 (ja) * | 2004-02-12 | 2010-04-28 | ソニー株式会社 | 半導体装置 |
| US7176530B1 (en) * | 2004-03-17 | 2007-02-13 | National Semiconductor Corporation | Configuration and fabrication of semiconductor structure having n-channel channel-junction field-effect transistor |
| US7241674B2 (en) * | 2004-05-13 | 2007-07-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming silicided gate structure |
| JP4134001B2 (ja) * | 2004-10-29 | 2008-08-13 | 富士通株式会社 | 半導体装置の製造方法 |
| JP4440080B2 (ja) * | 2004-11-12 | 2010-03-24 | 株式会社東芝 | 半導体装置およびその製造方法 |
| US20060267106A1 (en) * | 2005-05-26 | 2006-11-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Novel semiconductor device with improved channel strain effect |
-
2006
- 2006-07-06 JP JP2006186460A patent/JP5114881B2/ja not_active Expired - Fee Related
- 2006-07-25 US US11/492,199 patent/US7977194B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US7977194B2 (en) | 2011-07-12 |
| US20070026595A1 (en) | 2007-02-01 |
| JP2007059881A (ja) | 2007-03-08 |
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