JP5113433B2 - メモリコントローラ - Google Patents
メモリコントローラ Download PDFInfo
- Publication number
- JP5113433B2 JP5113433B2 JP2007154438A JP2007154438A JP5113433B2 JP 5113433 B2 JP5113433 B2 JP 5113433B2 JP 2007154438 A JP2007154438 A JP 2007154438A JP 2007154438 A JP2007154438 A JP 2007154438A JP 5113433 B2 JP5113433 B2 JP 5113433B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- clock signal
- frequency
- dll
- memory module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Power Sources (AREA)
- Memory System (AREA)
- Dram (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007154438A JP5113433B2 (ja) | 2007-06-11 | 2007-06-11 | メモリコントローラ |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007154438A JP5113433B2 (ja) | 2007-06-11 | 2007-06-11 | メモリコントローラ |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2008305349A JP2008305349A (ja) | 2008-12-18 |
JP2008305349A5 JP2008305349A5 (ru) | 2010-07-22 |
JP5113433B2 true JP5113433B2 (ja) | 2013-01-09 |
Family
ID=40233981
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007154438A Active JP5113433B2 (ja) | 2007-06-11 | 2007-06-11 | メモリコントローラ |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5113433B2 (ru) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9904478B2 (en) | 2015-08-31 | 2018-02-27 | Samsung Electronics Co., Ltd. | Storage device and method for controlling thereof |
US10565154B2 (en) | 2018-01-09 | 2020-02-18 | Samsung Electronics Co., Ltd. | Mobile device and interfacing method thereof that adjusts clock frequency based on access mode |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8645743B2 (en) * | 2010-11-22 | 2014-02-04 | Apple Inc. | Mechanism for an efficient DLL training protocol during a frequency change |
JP6184064B2 (ja) | 2012-07-19 | 2017-08-23 | インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation | メモリサブシステム、コンピュータ・システム |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4450586B2 (ja) * | 2003-09-03 | 2010-04-14 | 株式会社ルネサステクノロジ | 半導体集積回路 |
JP4526841B2 (ja) * | 2004-03-09 | 2010-08-18 | ルネサスエレクトロニクス株式会社 | メモリ制御装置およびこれを備えたデータ処理システム |
JP4416580B2 (ja) * | 2004-06-28 | 2010-02-17 | 株式会社リコー | 遅延制御装置 |
JP4710300B2 (ja) * | 2004-10-28 | 2011-06-29 | ソニー株式会社 | 同期型メモリのクロック信号制御方法および装置、同期型メモリ制御装置並びに同期型メモリ |
JP4786262B2 (ja) * | 2005-09-06 | 2011-10-05 | ルネサスエレクトロニクス株式会社 | インターフェイス回路 |
JP5005928B2 (ja) * | 2006-02-21 | 2012-08-22 | 株式会社リコー | インタフェース回路及びそのインタフェース回路を備えた記憶制御装置 |
JP2007310549A (ja) * | 2006-05-17 | 2007-11-29 | Sony Corp | メモリ制御装置 |
JP4959264B2 (ja) * | 2006-09-15 | 2012-06-20 | 株式会社リコー | メモリ制御装置 |
-
2007
- 2007-06-11 JP JP2007154438A patent/JP5113433B2/ja active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9904478B2 (en) | 2015-08-31 | 2018-02-27 | Samsung Electronics Co., Ltd. | Storage device and method for controlling thereof |
US10565154B2 (en) | 2018-01-09 | 2020-02-18 | Samsung Electronics Co., Ltd. | Mobile device and interfacing method thereof that adjusts clock frequency based on access mode |
Also Published As
Publication number | Publication date |
---|---|
JP2008305349A (ja) | 2008-12-18 |
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