JP5109361B2 - 複合基板 - Google Patents
複合基板 Download PDFInfo
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- JP5109361B2 JP5109361B2 JP2006337567A JP2006337567A JP5109361B2 JP 5109361 B2 JP5109361 B2 JP 5109361B2 JP 2006337567 A JP2006337567 A JP 2006337567A JP 2006337567 A JP2006337567 A JP 2006337567A JP 5109361 B2 JP5109361 B2 JP 5109361B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
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- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Combinations Of Printed Boards (AREA)
Description
12,12x,12y 基板本体
12a 他方主面
12b 一方主面
12s 他方主面
12t 一方主面
18 端子
20,20a,20b,20c,20d 小片部品
22,22a,22b,22c,22d 主部
30 接続部材
32 第1片
34 中間片
36 第2片
40,42,50,55 チップ状電子部品
Claims (13)
- 少なくとも一方主面に端子を有する基板本体と、
前記基板本体の前記一方主面に接合される複数の小片部品と、
を備えた複合基板であって、
前記小片部品は、
絶縁材料からなる主部と、
中間片の両端にそれぞれ第1片と第2片とが連続する接続部材と、
を有し、
前記小片部品の前記主部は、金型内に前記接続部材となる部分を挿入した状態で成形した樹脂であり、
前記接続部材の前記第1片は、前記主部の前記基板本体側に露出して、前記基板本体の前記一方主面の前記端子に接合され、
前記接続部材の前記第2片は、前記主部の前記基板本体とは反対側に露出し、
前記小片部品は、前記接続部材の前記第1片又は前記第2片の少なくとも一方が、前記主部から離間して可動であることを特徴とする複合部品。 - 前記接続部材の前記中間片は、
前記主部の側面に沿って配置され、
前記第1片側と前記第2片側との間の中間部分のみが、前記主部に固定されていることを特徴とする、請求項1に記載の複合基板。 - 前記接続部材の前記第1片は、前記中間片とは反対側の部分が前記主部に埋め込まれていることを特徴とする、請求項1に記載の複合部材。
- 前記基板本体の前記一方主面において、周縁に沿って前記小片部品が配置され、
前記小片部品よりも内側に、チップ状電子部品が搭載されていることを特徴とする、請求項1〜3のいずれか一項に記載の複合基板。 - 前記チップ状電子部品が樹脂で封止され、該樹脂と前記小片部品とが間隔を設けて離れていることを特徴とする、請求項4に記載の複合基板。
- 前記小片部品の前記接続部材は、金属薄板の打ち抜き加工及び折り曲げ加工により形成されていることを特徴とする、請求項1〜5のいずれか一項に記載の複合基板。
- 前記基板本体がセラミック基板であることを特徴とする、請求項1〜6のいずれか一項に記載の複合基板。
- 前記基板本体は、1050℃以下で焼結する複数のセラミック層を積層してなるセラミック多層基板であることを特徴とする、請求項1〜7のいずれか一項に記載の複合基板。
- 前記小片部品の前記接続部材の前記金属薄板は可撓性を有することを特徴とする、請求項6に記載の複合基板。
- 前記接続部材の厚みは、50μm以上、かつ300μm以下であることを特徴とする、請求項1〜9のいずれか一項に記載の複合基板。
- 前記基板本体の他方主面に、チップ状電子部品が搭載されていることを特徴とする、請求項1〜10のいずれか一項に記載の複合基板。
- 外部回路基板の端子に、請求項1〜11のいずれか一項に記載の複合基板の前記接続部材の前記第2片が接合されていることを特徴とする、複合部品。
- 少なくとも一方主面に端子が設けられた基板本体と、小片部品とを準備する第1の工程と、
前記基板本体の前記一方主面に、前記小片部品を接合する第2の工程とを備えた、複合基板の製造方法であって、
前記第1の工程において、
前記小片部品は、
絶縁材料からなる主部と、
中間片の両端にそれぞれ第1片と第2片とが連続する接続部材と、
を有し、
前記小片部品の前記主部は、金型内に前記接続部材となる部分を挿入した状態で成形した樹脂であり、
前記接続部材は、
前記第1片及び第2片が前記主部の両主面にそれぞれ露出し、前記第1片又は前記第2片の少なくとも一方が、前記主部から離間して可動であり、
前記第2の工程において、
前記小片部品は、前記基板本体の前記一方主面の周縁に沿って配置され、
前記小片部品の前記接続部材の前記第1片が、前記基板本体の前記一方主面に設けられた前記端子に接合されることを特徴とする、複合基板の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006337567A JP5109361B2 (ja) | 2006-12-14 | 2006-12-14 | 複合基板 |
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---|---|---|---|
JP2006337567A JP5109361B2 (ja) | 2006-12-14 | 2006-12-14 | 複合基板 |
Publications (2)
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JP2008153307A JP2008153307A (ja) | 2008-07-03 |
JP5109361B2 true JP5109361B2 (ja) | 2012-12-26 |
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JP2006337567A Active JP5109361B2 (ja) | 2006-12-14 | 2006-12-14 | 複合基板 |
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Families Citing this family (1)
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WO2018043129A1 (ja) * | 2016-08-31 | 2018-03-08 | 株式会社村田製作所 | 回路モジュールおよびその製造方法 |
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JP2000164802A (ja) * | 1998-11-27 | 2000-06-16 | Matsushita Electric Ind Co Ltd | 表面実装型電子部品の実装方法 |
JP4572467B2 (ja) * | 2001-01-16 | 2010-11-04 | 株式会社デンソー | マルチチップ半導体装置およびその製造方法 |
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