JP5098301B2 - 電力用半導体装置 - Google Patents
電力用半導体装置 Download PDFInfo
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- JP5098301B2 JP5098301B2 JP2006304887A JP2006304887A JP5098301B2 JP 5098301 B2 JP5098301 B2 JP 5098301B2 JP 2006304887 A JP2006304887 A JP 2006304887A JP 2006304887 A JP2006304887 A JP 2006304887A JP 5098301 B2 JP5098301 B2 JP 5098301B2
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- 239000004065 semiconductor Substances 0.000 title claims description 64
- 229920005989 resin Polymers 0.000 claims description 66
- 239000011347 resin Substances 0.000 claims description 66
- 229920005992 thermoplastic resin Polymers 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 description 17
- 230000000694 effects Effects 0.000 description 7
- 238000002347 injection Methods 0.000 description 7
- 239000007924 injection Substances 0.000 description 7
- 238000000465 moulding Methods 0.000 description 6
- 239000003365 glass fiber Substances 0.000 description 5
- 239000004734 Polyphenylene sulfide Substances 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 229920000069 polyphenylene sulfide Polymers 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000005336 cracking Methods 0.000 description 3
- 230000006378 damage Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 229910017944 Ag—Cu Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000011231 conductive filler Substances 0.000 description 1
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- 239000000470 constituent Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000004519 grease Substances 0.000 description 1
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- 229910052751 metal Inorganic materials 0.000 description 1
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- 238000007711 solidification Methods 0.000 description 1
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- 229920001169 thermoplastic Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
本発明はかかる問題点を解決し、樹脂が流動する高さを変化させることによって樹脂が充填される速度を選択的にコントロールし、充填圧力を上げることなく充填速度を上げ、さらには配線材料の変形を発生させない電力用半導体装置を提供するものである。
この発明のその他の形態および効果については、以下に説明する。
実施の形態1.
図1は本発明の実施の形態1にかかる電力用半導体装置100の外形図である。また、図2は本発明にかかる電力用半導体装置100の内部の図であり、半導体素子の固定状態を示している。
電力用半導体装置100は、熱可塑性樹脂例えばガラス繊維を配合することによって強度を向上させたガラス繊維強化のPPS(ポリフェニレンサルファイド)よりなる樹脂筐体1により外形をなし、外部との入出力のための外部端子2、信号端子3が露出している。
PPSをはじめとする熱可塑性樹脂によって樹脂封止をする際には樹脂が硬化する前に成形金型内に樹脂を充填する必要があり、短時間で封止を完了させるために、製造時間が短縮されるメリットがある半面、充填速度が速いということが問題となる。
本願発明者らは、樹脂注入の際に金型面に近い部分で金型面で発生する流動抵抗と、樹脂温度が低下することから、流速が遅くなり、配線変形による不良を抑制する効果を得ることを実験的にも確認し、エポキシ樹脂などのコーティングが不要となる構造であることを見出した。
図4は本発明の実施の形態2にかかる電力用半導体装置200の外形図であり、図5は本発明にかかる電力用半導体装置200の内部の図であり、半導体素子の固定状態を示している。また、図6は図4の電力用半導体装置200のII−II方向の断面図である。
配線材料が従来のAlワイヤの配線であった場合にも、パッケージを薄くすることで配線変形を抑制する効果はあったが、100Aを超える大電流を扱う場合などは配線本数が10本を超えるような配線が必要となるため、配線間へ熱可塑性樹脂が流入しにくいという課題があった。
特に大電流を流す配線について、配線間へ樹脂が流入しないと、通電中の配線発熱が大きくなり、通電容量が低下しやすいという問題があり、配線間へ樹脂を流入させることが必要となる。
図7は本発明の実施の形態3にかかる電力用半導体装置の断面図であり、半導体素子等の固定状態を示している。
この実施の形態では、IGBT4の制御電極上に配線されているワイヤ状の配線11bのループ形状の頂点を含む領域において、熱可塑性樹脂の樹脂筐体1に凹部が形成されており、凹部を形成する部分では樹脂筐体に勾配を設けている。
図8は本発明の実施の形態にかかる電力用半導体装置300の外形図であり、図9は図8の電力用半導体装置300のIII−III方向の断面図である。
Claims (3)
- 基板上で電気回路パターンの一部分の上に固着された少なくとも一つの半導体素子と、
前記半導体素子の表面と前記電気回路パターンの他の部分とを接続し、または前記半導体素子の表面と他の半導体素子の表面とを接続するループ形状の配線の複数の群と、
前記基板の上で少なくとも前記半導体素子および前記配線を覆う熱可塑性樹脂の樹脂筐体とを備え、
前記樹脂筐体に、その厚さが前記ループ形状の配線の前記複数の群ごとに前記配線のループ形状の頂点を含む領域で薄くなるように凹部が形成されたことを特徴とする電力用半導体装置。 - 基板上で電気回路パターンの一部分の上に固着され、表面に主電極と制御電極とを有する少なくとも一つの半導体素子と、
前記半導体素子表面の前記主電極と他の半導体素子の表面とを接続し、または前記半導体素子表面の前記主電極と前記電気回路パターンの他の部分とを接続する板状の配線と、
前記半導体素子表面の前記制御電極と前記電気回路パターンのさらに他の部分とを接続するループ形状の線状の配線の複数の群と、
前記基板の上で少なくとも前記半導体素子および前記各配線を覆う熱可塑性樹脂の樹脂筐体とを備え、
前記樹脂筐体に、その厚さが前記ループ形状の線状配線の複数の群ごとに前記線状配線のループ形状の頂点を含む領域で薄くなるように凹部が形成されたことを特徴とする電力用半導体装置。 - 前記樹脂筐体に構成されている凹部は、その凹部底面の端部から上方に拡大する方向に傾斜が形成され、あるいはその凹部底面の端部がR形状に形成されていることを特徴とする請求項1ないし2に記載の電力用半導体装置。
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JP2012022697A Division JP5273265B2 (ja) | 2012-02-06 | 2012-02-06 | 電力用半導体装置 |
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JP4634498B2 (ja) | 2008-11-28 | 2011-02-16 | 三菱電機株式会社 | 電力用半導体モジュール |
JP5272768B2 (ja) * | 2009-02-05 | 2013-08-28 | 三菱電機株式会社 | 電力用半導体装置とその製造方法 |
JP5467933B2 (ja) | 2010-05-21 | 2014-04-09 | 株式会社東芝 | 半導体装置 |
JP5974428B2 (ja) * | 2011-07-14 | 2016-08-23 | 三菱電機株式会社 | 半導体装置 |
KR101354894B1 (ko) * | 2011-10-27 | 2014-01-23 | 삼성전기주식회사 | 반도체 패키지, 그 제조방법 및 이를 포함하는 반도체 패키지 모듈 |
JP6154342B2 (ja) * | 2013-12-06 | 2017-06-28 | トヨタ自動車株式会社 | 半導体装置 |
EP4401126A3 (en) * | 2018-01-30 | 2024-09-25 | Infineon Technologies AG | Power semiconductor module and method for producing the same |
KR102448238B1 (ko) | 2018-07-10 | 2022-09-27 | 삼성전자주식회사 | 반도체 패키지 |
JP7292155B2 (ja) * | 2019-08-28 | 2023-06-16 | 三菱電機株式会社 | 半導体装置 |
JPWO2022080081A1 (ja) * | 2020-10-16 | 2022-04-21 |
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JP3674333B2 (ja) * | 1998-09-11 | 2005-07-20 | 株式会社日立製作所 | パワー半導体モジュール並びにそれを用いた電動機駆動システム |
JP2003318315A (ja) * | 2002-04-25 | 2003-11-07 | Furukawa Electric Co Ltd:The | トランジスタベアチップ実装配線基板およびその製造方法 |
JP2004335493A (ja) * | 2003-03-13 | 2004-11-25 | Denso Corp | 半導体装置の実装構造 |
JP4334296B2 (ja) * | 2003-08-01 | 2009-09-30 | 三洋電機株式会社 | 混成集積回路装置の製造方法 |
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