JP5030172B2 - 絶縁膜及びその製造方法、並びに絶縁膜を備えた電子デバイス - Google Patents
絶縁膜及びその製造方法、並びに絶縁膜を備えた電子デバイス Download PDFInfo
- Publication number
- JP5030172B2 JP5030172B2 JP2008151046A JP2008151046A JP5030172B2 JP 5030172 B2 JP5030172 B2 JP 5030172B2 JP 2008151046 A JP2008151046 A JP 2008151046A JP 2008151046 A JP2008151046 A JP 2008151046A JP 5030172 B2 JP5030172 B2 JP 5030172B2
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- Prior art keywords
- insulating film
- film
- substrate
- manufacturing
- vapor deposition
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Hall/Mr Elements (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
2、12;蒸着絶縁膜
13;スパッタ絶縁膜
20;トランジスタ
22、23;p型半導体領域
24;ゲート絶縁膜
25;ゲート電極
26;ソース電極
27;ドレイン電極
Claims (3)
- 基板上にAl、Hf及びZrからなる群から選択された少なくとも1種の元素を含む酸化物からなる第1の絶縁膜を蒸着する工程と、この第1の絶縁膜に対して、前記基板の温度を300乃至500℃にして、水素プラズマ処理を施す工程と、を有することを特徴とする絶縁膜の製造方法。
- 請求項1に記載の絶縁膜の製造方法により製造され、Hf及びZrからなる群から選択された少なくとも1種の元素が添加されたアルミナ絶縁膜からなり、絶縁破壊電界が2MV/cm以上であることを特徴とする絶縁膜。
- 請求項2に記載の絶縁膜を有することを特徴とする電子デバイス。
Priority Applications (1)
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JP2008151046A JP5030172B2 (ja) | 2008-06-09 | 2008-06-09 | 絶縁膜及びその製造方法、並びに絶縁膜を備えた電子デバイス |
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JP2008151046A JP5030172B2 (ja) | 2008-06-09 | 2008-06-09 | 絶縁膜及びその製造方法、並びに絶縁膜を備えた電子デバイス |
Related Parent Applications (1)
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JP2004304034A Division JP4408787B2 (ja) | 2004-10-19 | 2004-10-19 | 絶縁膜及びその製造方法、並びに絶縁膜を備えた電子デバイス |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008283202A JP2008283202A (ja) | 2008-11-20 |
JP5030172B2 true JP5030172B2 (ja) | 2012-09-19 |
Family
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JP2008151046A Expired - Fee Related JP5030172B2 (ja) | 2008-06-09 | 2008-06-09 | 絶縁膜及びその製造方法、並びに絶縁膜を備えた電子デバイス |
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JP (1) | JP5030172B2 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100655774B1 (ko) * | 2004-10-14 | 2006-12-11 | 삼성전자주식회사 | 식각 저지 구조물, 이의 제조 방법, 이를 포함하는 반도체장치 및 그 제조 방법 |
JP5496635B2 (ja) | 2008-12-19 | 2014-05-21 | 住友電工デバイス・イノベーション株式会社 | 半導体装置の製造方法 |
JP2013084951A (ja) * | 2011-09-30 | 2013-05-09 | Asahi Kasei Electronics Co Ltd | 半導体装置および半導体装置の製造方法 |
US9570671B2 (en) | 2014-03-12 | 2017-02-14 | Kabushiki Kaisha Toshiba | Magnetic memory device |
CN116695079B (zh) * | 2023-06-09 | 2024-04-02 | 深圳市博源碳晶科技有限公司 | 一种导热绝缘金刚石复合材料基板及其制备方法和应用 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0726196B2 (ja) * | 1988-07-04 | 1995-03-22 | 株式会社村田製作所 | アルミナ薄膜の形成方法 |
US6246076B1 (en) * | 1998-08-28 | 2001-06-12 | Cree, Inc. | Layered dielectric on silicon carbide semiconductor structures |
JP2001200362A (ja) * | 2000-01-17 | 2001-07-24 | Hitachi Ltd | 成膜方法及び成膜装置 |
JP4083000B2 (ja) * | 2002-12-12 | 2008-04-30 | 東京エレクトロン株式会社 | 絶縁膜の形成方法 |
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- 2008-06-09 JP JP2008151046A patent/JP5030172B2/ja not_active Expired - Fee Related
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JP2008283202A (ja) | 2008-11-20 |
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