CN107419237B - 半导体装置的制造方法和半导体装置 - Google Patents

半导体装置的制造方法和半导体装置 Download PDF

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CN107419237B
CN107419237B CN201710156820.3A CN201710156820A CN107419237B CN 107419237 B CN107419237 B CN 107419237B CN 201710156820 A CN201710156820 A CN 201710156820A CN 107419237 B CN107419237 B CN 107419237B
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insulating film
semiconductor layer
semiconductor device
region
type semiconductor
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CN107419237A (zh
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西井润弥
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Toyoda Gosei Co Ltd
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Toyoda Gosei Co Ltd
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Abstract

本发明提供一种制造机能稳定的半导体装置的技术。半导体装置的制造方法具备如下工序：第1工序，在半导体层上，以含有氮的有机金属为原料，通过原子层沉积法将绝缘膜成膜；第2工序，在含有氧和臭氧中的至少一者的环境下对上述绝缘膜进行氧等离子体处理；以及，第3工序，在上述第2工序后，在含氮环境下对上述绝缘膜进行热处理。

Description

半导体装置的制造方法和半导体装置
技术领域
本发明涉及半导体装置的制造方法和半导体装置。
背景技术
以往已知具备绝缘膜的半导体装置，作为形成绝缘膜的方法，例如，已知原子层沉积(Atomic Layer Deposition：ALD)法。然而，已知在通过ALD法成膜的绝缘膜中含有来自成膜原料的杂质，这些杂质使绝缘膜的CV磁滞增大(例如，专利文献1)。因此，专利文献1中公开了着眼于成膜原料所含的碳(C)，减少碳(C)的方法。
现有技术
专利文献
专利文献1：日本特开2004－288884号公报
发明内容
然而，专利文献1所记载的方法作为抑制绝缘膜的CV磁滞的方法并不充分，期望一种进一步抑制了绝缘膜的CV磁滞的机能稳定的半导体装置的制造技术。
本发明是为了解决上述课题的至少一部分而完成的，能够作为以下形式而实现。
(1)根据本发明的一个方式，提供一种半导体装置的制造方法。该半导体装置的制造方法具备如下工序：第1工序，在半导体层上，以含有氮的有机金属为原料，通过原子层沉积法将绝缘膜成膜；第2工序，在含有氧和臭氧中的至少一者的环境下对上述绝缘膜进行氧等离子体处理；以及，第3工序，在上述第2工序后，在含氮环境下对上述绝缘膜进行热处理。根据该方式的半导体装置的制造方法，可以抑制绝缘膜的CV磁滞，因此可以制造机能稳定的半导体装置。
(2)如上述的制造方法，其中，上述氧等离子体处理中可使用远程等离子体。根据该方式的半导体装置的制造方法，可以减轻氧等离子体处理时的等离子体对绝缘膜的损害。
(3)如上述的制造方法，其中，在上述氧等离子体处理中可使用电子回旋共振等离子体。根据该方式的半导体装置的制造方法，可以进一步减轻氧等离子体处理时的等离子体对绝缘膜的损害。
(4)根据本发明的其它方式，提供一种半导体装置，其具备半导体层和与上述半导体层接触的绝缘膜。该半导体装置中，从上述绝缘膜的未与上述半导体层接触的面起到深度为30nm为止的上述绝缘膜的区域的平均氮浓度小于3.0×1018cm－3，从自上述绝缘膜的未与上述半导体层接触的面起深度为30nm的假想面到直至与上述半导体层接触的面为止深度为20nm的假想面的绝缘膜的区域的平均氮浓度为3.0×1018cm－3以上且小于1.0×1019cm－3。根据该方式的半导体装置，可以抑制绝缘膜的CV磁滞，因此可以具备高的机能稳定性。
(5)在上述半导体装置中，从上述绝缘膜的未与上述半导体层接触的面到深度为20nm为止的上述绝缘膜的区域的平均氢浓度可以为1.0×1020cm－3以上且小于1.0×1021cm－3。根据该方式的半导体装置，可以抑制绝缘膜的CV磁滞，因此可以具备高的机能稳定性。
(6)在上述半导体装置中，上述绝缘膜上可以具备由金属形成的电极。根据该方式的半导体装置，可以抑制绝缘膜的CV磁滞，因此可以具备高的机能稳定性。
(7)在上述半导体装置中，上述半导体层可以具备沟部且上述绝缘膜形成于上述沟部的内侧。根据该方式的半导体装置，可以抑制绝缘膜的CV磁滞，因此可以具备高的机能稳定性。
(8)上述的半导体装置可以是纵型沟槽MOSFET。根据该方式的半导体装置，可以抑制绝缘膜的CV磁滞，因此可以具备高的机能稳定性。
本发明也能够以半导体装置的制造方法以及半导体装置以外的各种方式实现。例如，能够以使用上述制造方法制造半导体装置的装置等方式实现。
根据本发明的半导体装置的制造方法，可以抑制绝缘膜的CV磁滞，因此可以制造机能稳定的半导体装置。此外，根据本发明的半导体装置，可以抑制绝缘膜的CV磁滞，因此可以具备高的机能稳定性。
附图说明
图1是示意性表示第1实施方式中的半导体装置的构成的截面图。
图2是表示第1实施方式中的半导体装置的制造方法的工序图。
图3是表示第1实施方式中的绝缘膜的形成工序的工序图。
图4是示意性表示绝缘膜的形成工序后的绝缘膜的浓度分布的截面图。
图5是表示评价试验的结果的图。
图6是表示评价试验的结果的图。
图7是表示评价试验的结果的图。
图8是表示评价试验的结果的图。
图9是表示评价试验的结果的图。
图10是表示评价试验的结果的图。
具体实施方式
A.第1实施方式
A－1.半导体装置的构成
图1是示意性表示第1实施方式中的半导体装置100的构成的截面图。图1中图示有相互垂直的XYZ轴。图1的XYZ轴中，X轴是从图1的纸面左侧朝向纸面右侧的轴。+X轴方向是朝向纸面右侧的方向，－X轴方向是朝向纸面左侧的方向。图1的XYZ轴中，Y轴是从图1的纸面正面朝向纸面背面的轴。+Y轴方向是朝向纸面背面的方向，－Y轴方向是朝向纸面正面的方向。图1的XYZ轴中，Z轴是从图1的纸面下侧朝向纸面上侧的轴。+Z轴方向是朝向纸面上侧的方向，－Z轴方向是朝向纸面下侧的方向。图1的XYZ轴对应于其它图的XYZ轴。
本实施方式中，半导体装置100是使用氮化镓(GaN)而形成的GaN系的半导体装置。本实施方式中，半导体装置100是纵型沟槽MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)。本实施方式中，半导体装置100用于控制电力，也被称为电力设备。
半导体装置100具备基板110、n型半导体层112、p型半导体区域113、p型半导体层114、以及n型半导体层116。半导体装置100中，作为形成于这些半导体层的结构，具有沟槽122和凹槽124。半导体装置100进一步具备绝缘膜130、栅电极142、主电极144、源电极146以及漏电极148。
半导体装置100的基板110是沿着X轴和Y轴扩展的板状的半导体。本实施方式中，基板110主要由氮化镓(GaN)形成。本说明书的说明中，“主要由A(例如，氮化镓(GaN))形成”是指以摩尔分率计含有90％以上的A(例如，氮化镓(GaN))。本实施方式中，基板110是含有硅(Si)作为供体元素的n型半导体。本实施方式中，基板110所含的硅(Si)浓度的平均值为1×1018cm－3以上。基板110的厚度(Z轴方向的长度)为100μm(微米)以上，在本实施方式中为300μm。
半导体装置100的n型半导体层112是具有n型的特性的半导体。本实施方式中，n型半导体层112位于基板110的+Z轴方向侧，沿着X轴和Y轴扩展。本实施方式中，n型半导体层112主要由氮化镓(GaN)形成。本实施方式中，n型半导体层112含有硅(Si)作为供体元素(n型杂质)。本实施方式中，n型半导体层112所含的硅(Si)浓度的平均值约为1×1017cm－3以下，例如，在为1×1016cm－3的本实施方式中，n型半导体层112的厚度(Z轴方向的长度)为10μm。
半导体装置100的p型半导体区域113是通过对n型半导体层112的一部分的离子注入而形成的区域。p型半导体区域113的半导体具有p型的特性。本实施方式中，p型半导体区域113形成于远离沟槽122的位置，与n型半导体层112和p型半导体层114邻接。本实施方式中，p型半导体区域113与n型半导体层112同样地主要由氮化镓(GaN)形成。本实施方式中，p型半导体区域113含有镁(Mg)作为受体元素(p型杂质)。p型半导体区域113中，p型杂质的浓度高于n型杂质的浓度。本实施方式中，p型半导体区域113中的p型杂质的浓度相对于n型杂质的浓度为100倍以上。本实施方式中，p型半导体区域113中的镁(Mg)的浓度的平均值为1×1018cm－3以上。
半导体装置100的p型半导体层114是具有p型的特性的半导体。本实施方式中，p型半导体层114位于n型半导体层112和p型半导体区域113的+Z轴方向侧，沿着X轴和Y轴扩展。本实施方式中，p型半导体层114主要由氮化镓(GaN)形成。本实施方式中，p型半导体层114含有镁(Mg)作为受体元素。本实施方式中，p型半导体层114所含的镁(Mg)浓度的平均值约为4×1018cm－3以下。本实施方式中，p型半导体层114的厚度(Z轴方向的长度)约为1.0μm。
半导体装置100的n型半导体层116是具有n型的特性的半导体。本实施方式中，n型半导体层116位于p型半导体层114的+Z轴方向侧，沿着X轴和Y轴扩展。本实施方式中，n型半导体层116主要由氮化镓(GaN)形成。本实施方式中，n型半导体层116含有硅(Si)作为供体元素。本实施方式中，n型半导体层116所含的硅(Si)浓度的平均值为1×1018cm－3以上，约为3×1018cm－3。本实施方式中，n型半导体层116的厚度(Z轴方向的长度)为0.4μm以下，约为0.2μm。
半导体装置100的沟槽122是从n型半导体层116的+Z轴方向侧的面贯通n型半导体层116和p型半导体层114，落入至n型半导体层112的沟部。本实施方式中，沟槽122是通过对n型半导体层116、p型半导体层114和n型半导体层112的干式蚀刻而形成的结构。
半导体装置100的凹槽124是从n型半导体层116的+Z轴方向侧的面贯通n型半导体层116，跨过p型半导体层114凹陷的沟部。本实施方式中，凹槽124是通过对n型半导体层116和p型半导体层114的干式蚀刻而形成的结构。
半导体装置100的绝缘膜130是形成于沟槽122的内侧的具有电绝缘性的膜。本实施方式中，绝缘膜130从沟槽122的内侧形成于n型半导体层116的+Z轴方向侧的表面的一部分上。本实施方式中，绝缘膜130与半导体层112、114、116接触，主要由二氧化硅(SiO2)形成。
半导体装置100的栅电极142是介由绝缘膜130形成于沟槽122的内侧的电极。本实施方式中，栅电极142除了形成于沟槽122的内侧以外，还形成于作为沟槽122的外侧的绝缘膜130的+Z轴方向侧的面的一部分。栅电极142由金属形成，本实施方式中，主要由铝(Al)形成。在对栅电极142外加电压时，在p型半导体层114上形成反转层，该反转层作为通道发挥功能，从而在源电极146与漏电极148之间形成导通路径。换言之，在对栅电极142外加电压时，电流在基板110的铅直方向(Z轴方向)流动。
半导体装置100的主电极144是形成于凹槽124的对p型半导体层114欧姆接触的电极。本实施方式中，主电极144是通过对主要由钯(Pd)形成的层施加热处理而形成的电极。
半导体装置100的源电极146是对n型半导体层116欧姆接触的极。本实施方式中，源电极146从主电极144上形成于n型半导体层116的+Z轴方向侧的面的一部分上。源电极146也可以形成于远离主电极144的部位。本实施方式中，源电极146是通过在主要由钛(Ti)形成的层上层叠主要由铝(Al)形成的层后施加热处理而形成的电极。
半导体装置100的漏电极148是对基板110的－Z轴方向侧的背面欧姆接触的电极。本实施方式中，漏电极148是通过在主要由钛(Ti)形成的层层叠主要由铝(Al)形成的层后施加热处理而形成的电极。
A－2.半导体装置的制造方法
图2是表示第1实施方式中的半导体装置100的制造方法的工序图。首先，制造者在基板110上通过结晶生长而形成n型半导体层112(工序P110)。本实施方式中，制造者在基板110中的+Z轴方向侧的表面形成n型半导体层112。本实施方式中，制造者通过有机金属气相沉积法(MOCVD：Metal Organic Chemical Vapor Deposition)形成n型半导体层112。本实施方式中，n型半导体层112主要由氮化镓(GaN)形成。
在形成n型半导体层112后(工序P110)，制造者通过离子注入在n型半导体层112的一部分形成p型半导体区域113(工序P120)。本实施方式中，制造者在n型半导体层112中的+Z轴方向侧的一部分的区域形成p型半导体区域113。
在形成p型半导体区域113后(工序P120)，制造者在n型半导体层112和p型半导体区域113的表面形成p型半导体层114(工序P130)。本实施方式中，制造者通过有机金属气相沉积法(MOCVD)，主要由氮化镓(GaN)来形成p型半导体层114。
在形成p型半导体层114后(工序P130)，制造者在p型半导体层114上形成n型半导体层116(工序P140)。本实施方式中，制造者通过有机金属气相沉积法(MOCVD)形成n型半导体层116。
在形成n型半导体层116后(工序P140)，制造者通过蚀刻而形成沟槽122和凹槽124(工序P150)。本实施方式中，制造者通过干式蚀刻而形成沟槽122和凹槽124。
在形成沟槽122和凹槽124后(工序P150)，制造者形成绝缘膜(工序P160)。本实施方式中，制造者在从沟槽122露出的n型半导体层112的面和半导体层116的+Z轴方向侧的一部分的区域形成绝缘膜130。另外，绝缘膜130的形成工序(工序P160)中，在从沟槽122露出的p型半导体层114和n型半导体层116的侧面也形成绝缘膜130。
图3是表示第1实施方式中的绝缘膜130的形成工序(工序P160)的工序图。绝缘膜130的形成工序(工序P160)中，制造者首先在半导体层112、116上，以含有氮(N)的有机金属为原料，通过原子层沉积(ALD)法将绝缘膜130成膜(工序P161)。工序P161也称为第1工序。绝缘膜130的厚度(Z轴方向的长度)为50nm～200nm，在本实施方式中为100nm。
本说明书中，含有氮(N)的有机金属是指具有金属与氨基的键的化合物。作为含有氮(N)的有机金属，例如，可举出SAM.24(注册商标)、双叔丁基氨基硅烷(BTBAS)、三(二甲基氨基)硅烷(TDMAS)。
在将绝缘膜130成膜后(工序P161)，制造者在含有氧(O2)和臭氧(O3)中的至少一者的环境下对绝缘膜130进行氧等离子体处理(工序P163)。也将工序P163称为第2工序。氧等离子体处理以控制绝缘膜130中的氮(N)浓度为目的，并不以加工绝缘膜130的形状为目的。因此，氧等离子体处理与干式蚀刻不同。
本实施方式中，氧等离子体处理在含有氧(O2)的环境下进行。对于氧等离子体处理，例如，可举出使用直接等离子体的方法、使用远程等离子体的方法。从减轻对绝缘膜130或半导体层112、114、116的由等离子体所致的损害的观点出发，优选在氧等离子体处理中使用远程等离子体。此外，从进一步减轻对绝缘膜130或半导体层112、114、116的由等离子体所致的损害的观点出发优选在氧等离子体处理中使用电子回旋共振(ElectronCyclotron Resonance：ECR)等离子体。
在本实施方式的第2工序(工序P163)中，使用ECR等离子体，微波的激发功率为500W，氧流量为20sccm。第2工序(工序P163)优选在减压环境下进行，本实施方式中，压力为5.0×10－2Pa以下。通过经由第2工序(工序P163)，能够使绝缘膜130中的氮(N)、氢(H)脱离至绝缘膜130外，能够控制绝缘膜130中的氮(N)浓度、氢(H)浓度。另外，本实施方式中，未外加用于向基板110引入离子的偏置电源，但只要是对绝缘膜130或半导体层112、114、116的由等离子体所致的损害可以容许的范围，则也可以外加。
第2工序(工序P163)中，绝缘膜130可以是室温，也可以加热。绝缘膜130的加热可以通过对设置有具备绝缘膜130的半导体装置100的中间制品的载物台进行加热来进行。从使绝缘膜130中的氢(H)、氮(N)有效率地脱离的观点出发，第2工序(工序P163)中的绝缘膜130的温度优选为300℃以上，更优选为400℃以上，此外，优选为500℃以下。本实施方式中，与绝缘膜130间接地接触的基板110在达到300℃的状态下进行60分钟的第2工序(工序P163)。
在进行第2工序(工序P163)后，制造者在含氮(N)环境下对绝缘膜130进行热处理(工序P165)。也将工序P165称为第3工序。热处理的温度优选为400℃～500℃，在本实施方式中为500℃。通过经由第3工序(工序P165)，可恢复在第1工序(工序P161)中的对绝缘膜130或半导体层112、114、116的损害，使绝缘膜130的电特性稳定。通过进行第3工序(工序P165)，完成绝缘膜130的形成工序(工序P160)。
图4是示意性表示绝缘膜130的形成工序(工序P160)后的绝缘膜130的浓度分布的截面图。图4所记载的区域R对应于图1所记载的区域R。
从绝缘膜130的不与n型半导体层116接触的面S1(+Z轴方向侧的面)起深度(Z轴方向)为30nm为止的绝缘膜130的区域132是氮(N)低浓度的区域。因此，区域132也称为氮低浓度区域132。氮低浓度区域132的平均氮(N)浓度小于3.0×1018cm－3，在本实施方式中约为2.1×1018cm－3。作为区域132的氮(N)浓度低的原因，可举出如下方面：因经过第2工序(工序P163)和第3工序(工序P165)，绝缘膜130中的氮(N)脱离至绝缘膜130外。
此外，从抑制绝缘膜130的CV磁滞的观点出发，从绝缘膜130的不与n型半导体层116接触的面S1(+Z轴方向侧的面)起深度(Z轴方向)20nm为止的绝缘膜130的区域的平均氢(H)浓度优选为小于1021cm－3，优选为1.0×1020cm－3以上。区域132的氢(H)浓度低的原因与区域132的氮(N)浓度低的原因相同，即，因经由第2工序(工序P163)和第3工序(工序P165)，绝缘膜130中的氢(H)脱离至绝缘膜130外。
从假想面S2到假想面S3为止的绝缘膜130的区域134的平均氮(N)浓度为3.0×1018cm－3以上且小于1.0×1019cm－3，在本实施方式中约为5.7×1018cm－3。区域134也称为膜中区域134；上述假想面S2是从绝缘膜130的不与n型半导体层116接触的面S1起深度为30nm的假想面，上述假想面S3是到与n型半导体层116接触的面S4为止的深度为20nm的假想面，。
从假想面S3至面S4的绝缘膜130的区域136是氮(N)高浓度的区域。因此，区域136也称为氮高浓度区域136。作为区域136的氮(N)浓度高的原因，认为是如下方面：因经由第2工序(工序P163)和第3工序(工序P165)，膜中区域134中的氮(N)的一部分向n型半导体层116移动。
在形成绝缘膜130后(参照工序P160、图2)，制造者形成栅电极142、主电极144、源电极146和漏电极148(工序P170)。本实施方式中，使用溅射法和蒸镀法。经由这些工序，完成了半导体装置100。
A－3.效果
在以上说明的第1实施方式的制造方法中，在第1工序(工序P161)中将绝缘膜130成膜后，在第2工序(工序P163)中进行氧等离子体处理，其后，在第3工序(工序P165)中在含氮(N)环境下对绝缘膜130进行热处理。通过以这种方式进行，可以将绝缘膜130中的氮(N)设为优选浓度分布。其结果，在第1实施方式的制造方法中，可以抑制绝缘膜130的CV磁滞，因此可以制造机能稳定的半导体装置100。以下，示出证实在第1工序(工序P161)中将绝缘膜130成膜后经由第2工序(工序P163)和第3工序(工序P165)则能抑制绝缘膜130的CV磁滞的评价试验的结果。
A－4.试验结果
图5至图10是表示评价试验的结果的图。评价试验使用以下试样1～试样3。具体而言，试验者首先在n型半导体层116上将绝缘膜130成膜。绝缘膜130的厚度为100nm。接着，试验者对试样1和试样2的绝缘膜130进行氧等离子体处理。具体而言，试验者与上述实施方式同样地在将试样1的绝缘膜130加热至300℃的状态下进行等离子体处理(工序P163)。此外，试验者将试样2的绝缘膜130在常温下进行等离子体处理(工序P163)。应予说明，试样1和试样2为实施例，与此相对，试样3为比较例，因此试验者对试样3的绝缘膜130不进行等离子体处理(工序P163)。另外，试验者在所有试样中均进行热处理(工序P165)。
将加热至300℃的状态下进行等离子体处理的试样1的试验结果示于图5和图8。将在常温下进行等离子体处理(工序P163)的试样2的试验结果示于图6和图9。将不进行等离子体处理(工序P163)的试样3的试验结果示于图7和图10。
图5～图7示出通过二次离子质量分析法(Secondary Ion Mass Spectrometry：SIMS)测定各试样的绝缘膜130中的氮(N)浓度和氢(H)浓度的结果。在图5至图7中，横轴表示绝缘膜130的－Z轴方向的深度(nm)，纵轴表示氮(N)浓度和氢(H)浓度(cm－3)。深度0nm为绝缘膜130的+Z轴方向侧的表面。
图8至图10表示绝缘膜130的CV磁滞特性的结果。该结果是通过对绝缘膜130的表面(+Z轴方向侧的面)和n型半导体层116的背面(－Z轴方向侧的面)施加电压而测定的结果。图8至图10中，纵轴表示以绝缘膜容量(Ci)标准化的容量，横轴表示外加电压。该测定按以下条件进行。
·频率：100kHz
·电压扫描方向：0V→+4V→－6V→+8V→－10V→+12V→－16V
·扫描步骤：0.2V/步骤
·测定时温度：室温(25℃)
·测定环境：遮光环境
由图5至图7的结果可知以下内容。即，可知与未经由等离子体处理(工序P163)的试样3(比较例)的结果(图7参照)相比，经由等离子体处理(工序P163)的试样1、2(实施例)的结果(参照图5、6)中，在深度为0nm至30nm的区域氮(N)浓度变低。具体而言，该区域中的试样3(比较例)的平均氮浓度(参照图7)为3.0×1018cm－3以上，约为3.0×1019cm－3，与此相对，该区域中的试样1、2(实施例)的平均氮浓度(参照图5、6)为3.0×1018cm－3以下。由该结果可知，通过经由等离子体处理(工序P163)，绝缘膜130的表面附近的氮(N)脱离。
同样地，由图5至图7的结果可知以下内容。即，可知与不经由等离子体处理(工序P163)的试样3(比较例)的结果(图7参照)相比，经由等离子体处理(工序P163)的试样1、2(实施例)的结果(参照图5、6)中，在深度为0nm至20nm为止的区域氢(H)浓度变低。具体而言，该区域的试样3(比较例)的平均氢浓度(参照图7)大于1.0×1021cm－3，与此相对，该区域的试样1、2(实施例)的平均氢浓度(参照图5、6)为1.0×1021cm－3cm－3以下。由该结果可知，通过经由等离子体处理(工序P163)，绝缘膜130的表面附近的氢(H)脱离。另外，在图5至图7的结果中，作为深度为0nm至几nm为止的氮浓度和氢浓度高的理由，认为是绝缘膜130的表面附着物所引起的噪音的影响。
此外，由图8至图10的结果可知以下内容。即，可知与不经由等离子体处理(工序P163)的试样3(比较例)的结果(图10参照)相比，经由等离子体处理(工序P163)的试样1、2(实施例)的结果(参照图7、8)中通过绘制一次磁滞回线，封闭于该回线的面积较小。由该结果可知，与不经由等离子体处理(工序P163)的试样3(比较例)相比，经由等离子体处理(工序P163)的试样1、2(实施例)抑制CV磁滞。
此外，可知与在常温下进行等离子体处理(工序P163)的试样2的试验结果(参照图9)相比，在将绝缘膜130加热的状态下进行等离子体处理(工序P163)的试样1的试验结果(参照图10)中通过绘制一次磁滞回线，封闭于该回线的面积进一步变小。由该结果可知，与在常温下进行等离子体处理(工序P163)的情况相比，在将绝缘膜130加热的状态下进行等离子体处理(工序P163)的情况可进一步抑制CV磁滞。
B.其它实施方式
本发明不限于上述实施方式，可以在不脱离其主旨的范围内以各种构成实现。例如，对于发明内容中记载的各形式中的技术特征所对应的实施方式、实施例，变形例中的技术特征，可以为了解决上述课题的一部分或全部或者为了达成上述效果的一部分或全部而进行适当替换、组合。此外，若该技术特征在本说明书中没有作为必须的技术特征进行说明，则能够适当删除。
上述实施方式中，使用氮化镓作为半导体，但本发明不限于此。作为半导体，例如，也可以是硅(Si)、蓝宝石(Al2O3)和碳化硅(SiC)等。
本发明所应用的半导体装置不限于上述实施方式中说明的纵型沟槽MOSFET，例如，也可以是纵型肖特基势垒二极管、绝缘栅双极晶体管(IGBT：Insulated Gate BipolarTransistor)、MESFET(metal-semiconductor field effect transistor)等。本发明的半导体装置可以应用于在半导体层上具备绝缘膜的半导体装置，本发明的制造方法可以应用于具备在半导体层上形成绝缘膜的工序的制造方法。
上述实施方式中，各电极的材质不限于上述实施方式的材质，也可以是其它材质。
符号说明
100…半导体装置
110…基板(半导体层)
112…n型半导体层(半导体层)
113…p型半导体区域(半导体层)
114…p型半导体层(半导体层)
116…n型半导体层(半导体层)
122…沟槽
124…凹槽
130…绝缘膜
132…区域(氮低浓度区域)
134…区域(膜中区域)
136…区域(氮高浓度区域)
142…栅电极
144…主电极
146…源电极
148…漏电极
R…区域
S1…面
S2…假想面
S3…假想面
S4…面

Claims (8)

1.一种半导体装置的制造方法，具备如下工序：
第1工序，在半导体层上，以含有氮的有机金属为原料，通过原子层沉积法将绝缘膜成膜；
第2工序，在含有氧和臭氧中的至少一者的环境下对所述绝缘膜进行氧等离子体处理；以及
第3工序，在所述第2工序后，在含氮环境下对所述绝缘膜进行热处理，
其中，所述第2工序和所述第3工序是从所述绝缘膜将氮释放，使从所述绝缘膜的未与所述半导体层接触的面起到深度为30nm为止的所述绝缘膜的区域的平均氮浓度小于3.0×1018cm-3，使从自所述绝缘膜的未与所述半导体层接触的面起深度为30nm的假想面到直至与所述半导体层接触的面为止深度为20nm的假想面的绝缘膜的区域的平均氮浓度为3.0×1018cm-3以上且小于1.0×1019cm-3的工序。
2.如权利要求1所述的半导体装置的制造方法，其中，所述氧等离子体处理中使用远程等离子体。
3.如权利要求2所述的半导体装置的制造方法，其中，所述氧等离子体处理中使用电子回旋共振等离子体。
4.一种半导体装置，具备半导体层和与所述半导体层接触的绝缘膜，其中，
从所述绝缘膜的未与所述半导体层接触的面起到深度为30nm为止的所述绝缘膜的区域的平均氮浓度小于3.0×1018cm-3，
从自所述绝缘膜的未与所述半导体层接触的面起深度为30nm的假想面到直至与所述半导体层接触的面为止深度为20nm的假想面的绝缘膜的区域的平均氮浓度为3.0×1018cm-3以上且小于1.0×1019cm-3。
5.如权利要求4所述的半导体装置，其中，从所述绝缘膜的未与所述半导体层接触的面到深度为20nm为止的所述绝缘膜的区域的平均氢浓度为1.0×1020cm-3以上且小于1.0×1021cm-3。
6.如权利要求4或5所述的半导体装置，其中，在所述绝缘膜上具备由金属形成的电极。
7.如权利要求6所述的半导体装置，其中，所述半导体层具备沟部，所述绝缘膜形成于所述沟部的内侧。
8.如权利要求7所述的半导体装置，其中，所述半导体装置为纵型沟槽金属氧化物半导体场效应晶体管。
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