JP4987607B2 - レベルシフト回路 - Google Patents
レベルシフト回路 Download PDFInfo
- Publication number
- JP4987607B2 JP4987607B2 JP2007193516A JP2007193516A JP4987607B2 JP 4987607 B2 JP4987607 B2 JP 4987607B2 JP 2007193516 A JP2007193516 A JP 2007193516A JP 2007193516 A JP2007193516 A JP 2007193516A JP 4987607 B2 JP4987607 B2 JP 4987607B2
- Authority
- JP
- Japan
- Prior art keywords
- conductivity type
- level
- signal
- transistor
- type transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007193516A JP4987607B2 (ja) | 2007-07-25 | 2007-07-25 | レベルシフト回路 |
| US12/219,428 US7772883B2 (en) | 2007-07-25 | 2008-07-22 | Level shifter |
| US12/805,237 US7973560B2 (en) | 2007-07-25 | 2010-07-20 | Level shifter |
| US13/067,550 US8334709B2 (en) | 2007-07-25 | 2011-06-08 | Level shifter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007193516A JP4987607B2 (ja) | 2007-07-25 | 2007-07-25 | レベルシフト回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009033329A JP2009033329A (ja) | 2009-02-12 |
| JP2009033329A5 JP2009033329A5 (enExample) | 2010-02-18 |
| JP4987607B2 true JP4987607B2 (ja) | 2012-07-25 |
Family
ID=40294740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007193516A Expired - Fee Related JP4987607B2 (ja) | 2007-07-25 | 2007-07-25 | レベルシフト回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (3) | US7772883B2 (enExample) |
| JP (1) | JP4987607B2 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4987607B2 (ja) * | 2007-07-25 | 2012-07-25 | ルネサスエレクトロニクス株式会社 | レベルシフト回路 |
| US8525572B2 (en) * | 2011-02-15 | 2013-09-03 | Cavium, Inc. | Level-up shifter circuit |
| US8896360B2 (en) | 2011-02-15 | 2014-11-25 | Cavium, Inc. | Level-up shifter circuit for high speed and low power applications |
| US8907712B2 (en) * | 2012-03-27 | 2014-12-09 | Mediatek Inc. | Level shifter circuits capable of dealing with extreme input signal level voltage drops and compensating for device PVT variation |
| US8680912B2 (en) | 2012-07-17 | 2014-03-25 | Arm Limited | Level shifting circuitry |
| US9154117B2 (en) * | 2013-03-06 | 2015-10-06 | Qualcomm Incorporated | Pulse generation in dual supply systems |
| US10050624B2 (en) | 2016-05-18 | 2018-08-14 | Cavium, Inc. | Process-compensated level-up shifter circuit |
| JP7193222B2 (ja) * | 2017-04-11 | 2022-12-20 | 日清紡マイクロデバイス株式会社 | レベルシフト回路 |
| JP6955458B2 (ja) * | 2018-02-22 | 2021-10-27 | ルネサスエレクトロニクス株式会社 | レベルシフト回路 |
| US11152924B2 (en) | 2019-11-26 | 2021-10-19 | Samsung Electronics Co., Ltd. | Level shifter and operating method of level shifter |
| US11942942B1 (en) | 2022-11-21 | 2024-03-26 | Hong Kong Applied Science and Technology Research Institute Company Limited | High-speed level-shifter for power-conversion applications |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4845381A (en) | 1987-10-01 | 1989-07-04 | Vlsi Technology, Inc. | Voltage level shifting circuit |
| JPH08307236A (ja) * | 1995-05-08 | 1996-11-22 | Hitachi Ltd | ドライブ装置とこのドライブ装置を用いた半導体装置 |
| US5781026A (en) * | 1996-03-28 | 1998-07-14 | Industrial Technology Research Institute | CMOS level shifter with steady-state and transient drivers |
| JP4263963B2 (ja) * | 2000-02-10 | 2009-05-13 | パナソニック株式会社 | レベルシフト回路 |
| US6445210B2 (en) | 2000-02-10 | 2002-09-03 | Matsushita Electric Industrial Co., Ltd. | Level shifter |
| JP3502330B2 (ja) * | 2000-05-18 | 2004-03-02 | Necマイクロシステム株式会社 | 出力回路 |
| JP3717781B2 (ja) * | 2000-10-30 | 2005-11-16 | 株式会社ルネサステクノロジ | レベル変換回路および半導体集積回路 |
| JP3889954B2 (ja) * | 2001-10-29 | 2007-03-07 | 株式会社ルネサステクノロジ | 半導体装置 |
| JP2003309463A (ja) * | 2002-04-15 | 2003-10-31 | Mitsubishi Electric Corp | レベルシフト回路 |
| JP2004112310A (ja) * | 2002-09-18 | 2004-04-08 | Nec Yamagata Ltd | トランジスタ回路 |
| JP2004363740A (ja) | 2003-06-03 | 2004-12-24 | Matsushita Electric Ind Co Ltd | レベルシフタ |
| KR100500516B1 (ko) * | 2003-07-14 | 2005-07-12 | 삼성전자주식회사 | 레벨 쉬프터 및 레벨 쉬프팅 방법 |
| KR100476725B1 (ko) * | 2003-08-01 | 2005-03-16 | 삼성전자주식회사 | 바닥 레벨의 저전압원 감지 기능을 가지는 레벨 쉬프터 및레벨 쉬프팅 방법 |
| JP4060282B2 (ja) * | 2004-03-22 | 2008-03-12 | 三菱電機株式会社 | レベル変換回路、およびレベル変換機能付シリアル/パラレル変換回路 |
| JP2008258939A (ja) * | 2007-04-05 | 2008-10-23 | Matsushita Electric Ind Co Ltd | 多チャンネル半導体集積回路 |
| JP4987607B2 (ja) * | 2007-07-25 | 2012-07-25 | ルネサスエレクトロニクス株式会社 | レベルシフト回路 |
-
2007
- 2007-07-25 JP JP2007193516A patent/JP4987607B2/ja not_active Expired - Fee Related
-
2008
- 2008-07-22 US US12/219,428 patent/US7772883B2/en not_active Expired - Fee Related
-
2010
- 2010-07-20 US US12/805,237 patent/US7973560B2/en not_active Expired - Fee Related
-
2011
- 2011-06-08 US US13/067,550 patent/US8334709B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2009033329A (ja) | 2009-02-12 |
| US20110234291A1 (en) | 2011-09-29 |
| US20100289526A1 (en) | 2010-11-18 |
| US20090027082A1 (en) | 2009-01-29 |
| US7973560B2 (en) | 2011-07-05 |
| US8334709B2 (en) | 2012-12-18 |
| US7772883B2 (en) | 2010-08-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4987607B2 (ja) | レベルシフト回路 | |
| KR101623117B1 (ko) | 레벨 쉬프팅이 가능한 로직 회로 | |
| JP4987458B2 (ja) | 半導体記憶装置のデータ出力回路及び方法 | |
| US7714613B2 (en) | Level converter | |
| US7915914B1 (en) | 2×VDD-tolerant logic circuits and a related 2×VDD-tolerant I/O buffer with PVT compensation | |
| JPWO2008072649A1 (ja) | 論理回路とアドレスデコーダ回路及び半導体記憶装置 | |
| US7994835B2 (en) | Duty control circuit and semiconductor device having the same | |
| JP6538629B2 (ja) | 半導体記憶装置 | |
| US8754688B2 (en) | Signal output circuit and semiconductor device including the same | |
| JP5643158B2 (ja) | レベルシフト回路 | |
| US20080231336A1 (en) | Scan flip-flop circuit with extra hold time margin | |
| US9239703B2 (en) | Full adder circuit | |
| JP5886112B2 (ja) | 半導体集積回路装置、レベルシフト回路 | |
| JP2004364031A (ja) | 半導体集積回路 | |
| JP6540290B2 (ja) | レベルコンバータ回路 | |
| JP2006140928A (ja) | 半導体装置 | |
| JP6282124B2 (ja) | レベルシフト回路及び半導体装置 | |
| US8049547B2 (en) | Semiconductor integrated circuit and signal adjusting method | |
| JP2007067819A (ja) | 遅延調整回路及び該回路を備えた同期型半導体装置 | |
| KR100574498B1 (ko) | 반도체 장치의 초기화 회로 | |
| US7629826B2 (en) | Circuit for generating pulses for semiconductor memory apparatus | |
| JP2006270331A (ja) | インピーダンス調整回路及び集積回路装置 | |
| JP2005217860A (ja) | 遅延回路 | |
| KR100434966B1 (ko) | 출력 드라이버 | |
| KR100656471B1 (ko) | 입력 버퍼 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100105 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20100419 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120118 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120124 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120326 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120417 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120425 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150511 Year of fee payment: 3 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| LAPS | Cancellation because of no payment of annual fees |