JP4977686B2 - 平行電磁放射線を用いて薄膜内の引張応力を増大させる方法 - Google Patents

平行電磁放射線を用いて薄膜内の引張応力を増大させる方法 Download PDF

Info

Publication number
JP4977686B2
JP4977686B2 JP2008504043A JP2008504043A JP4977686B2 JP 4977686 B2 JP4977686 B2 JP 4977686B2 JP 2008504043 A JP2008504043 A JP 2008504043A JP 2008504043 A JP2008504043 A JP 2008504043A JP 4977686 B2 JP4977686 B2 JP 4977686B2
Authority
JP
Japan
Prior art keywords
sin film
substrate
electromagnetic radiation
tensile stress
gpa
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008504043A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008535244A5 (https=
JP2008535244A (ja
Inventor
真信 井下田
ワイダ，コリー
リューシンク，ヘルト
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of JP2008535244A publication Critical patent/JP2008535244A/ja
Publication of JP2008535244A5 publication Critical patent/JP2008535244A5/ja
Application granted granted Critical
Publication of JP4977686B2 publication Critical patent/JP4977686B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6536—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C23C16/345—Silicon nitride
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0431—Apparatus for thermal treatment
    • H10P72/0436—Apparatus for thermal treatment mainly by radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0602—Temperature monitoring

Landscapes

  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2008504043A 2005-03-29 2006-02-16 平行電磁放射線を用いて薄膜内の引張応力を増大させる方法 Expired - Fee Related JP4977686B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/091,756 US7265066B2 (en) 2005-03-29 2005-03-29 Method and system for increasing tensile stress in a thin film using collimated electromagnetic radiation
US11/091,756 2005-03-29
PCT/US2006/005419 WO2006104582A2 (en) 2005-03-29 2006-02-16 Method and system for increasing tensile stress in a thin film using collimated electromagnetic radiation

Publications (3)

Publication Number Publication Date
JP2008535244A JP2008535244A (ja) 2008-08-28
JP2008535244A5 JP2008535244A5 (https=) 2009-04-02
JP4977686B2 true JP4977686B2 (ja) 2012-07-18

Family

ID=37053841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008504043A Expired - Fee Related JP4977686B2 (ja) 2005-03-29 2006-02-16 平行電磁放射線を用いて薄膜内の引張応力を増大させる方法

Country Status (4)

Country Link
US (1) US7265066B2 (https=)
JP (1) JP4977686B2 (https=)
TW (1) TWI332256B (https=)
WO (1) WO2006104582A2 (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5017958B2 (ja) * 2006-08-08 2012-09-05 富士通セミコンダクター株式会社 半導体装置の製造方法
US7629273B2 (en) * 2006-09-19 2009-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method for modulating stresses of a contact etch stop layer
US20080138983A1 (en) * 2006-12-06 2008-06-12 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming tensile stress films for NFET performance enhancement
US7700499B2 (en) * 2007-01-19 2010-04-20 Freescale Semiconductor, Inc. Multilayer silicon nitride deposition for a semiconductor device
JP2008306132A (ja) * 2007-06-11 2008-12-18 Renesas Technology Corp 半導体装置の製造方法
US20090189227A1 (en) * 2008-01-25 2009-07-30 Toshiba America Electronic Components, Inc. Structures of sram bit cells
US8236709B2 (en) * 2009-07-29 2012-08-07 International Business Machines Corporation Method of fabricating a device using low temperature anneal processes, a device and design structure
US9281238B2 (en) 2014-07-11 2016-03-08 United Microelectronics Corp. Method for fabricating interlayer dielectric layer
US12455511B2 (en) * 2022-02-04 2025-10-28 Tokyo Electron Limited In-situ lithography pattern enhancement with localized stress treatment tuning using heat zones

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03291931A (ja) * 1990-04-10 1991-12-24 Canon Inc レジストレスパターニング方法
JPH08203894A (ja) * 1995-01-30 1996-08-09 Sony Corp 半導体装置の製造方法
JPH0978245A (ja) * 1995-09-08 1997-03-25 Canon Inc 薄膜形成方法
JPH1070123A (ja) * 1996-06-17 1998-03-10 Siemens Ag 表面状態の不動態化を容易にする層を有する装置構造
US6492282B1 (en) * 1997-04-30 2002-12-10 Siemens Aktiengesellschaft Integrated circuits and manufacturing methods
US6740566B2 (en) * 1999-09-17 2004-05-25 Advanced Micro Devices, Inc. Ultra-thin resist shallow trench process using high selectivity nitride etch
JP3425579B2 (ja) * 1999-12-08 2003-07-14 Ｎｅｃエレクトロニクス株式会社 半導体装置の製造方法
US6429135B1 (en) 2001-01-05 2002-08-06 United Microelectronics Corp. Method of reducing stress between a nitride silicon spacer and a substrate
US8288239B2 (en) * 2002-09-30 2012-10-16 Applied Materials, Inc. Thermal flux annealing influence of buried species
WO2003102724A2 (en) 2002-05-29 2003-12-11 Tokyo Electron Limited Method and system for data handling, storage and manipulation
US20050217799A1 (en) 2004-03-31 2005-10-06 Tokyo Electron Limited Wafer heater assembly
JP2005310927A (ja) * 2004-04-20 2005-11-04 Toshiba Corp 紫外線照射による高品質シリコン窒化膜の成膜方法

Also Published As

Publication number Publication date
TWI332256B (en) 2010-10-21
WO2006104582A3 (en) 2007-06-07
WO2006104582A2 (en) 2006-10-05
US20060226519A1 (en) 2006-10-12
US7265066B2 (en) 2007-09-04
TW200723486A (en) 2007-06-16
JP2008535244A (ja) 2008-08-28

Similar Documents

Publication Publication Date Title
JP4886767B2 (ja) 多周波電磁放射線を用いて薄膜内の引張応力を増大させる方法
JP5219815B2 (ja) 引張応力を有するシリコン酸窒化膜を形成する方法
KR101350544B1 (ko) 스트레인드 실리콘 질화물막들의 형성 방법 및 이러한 막들을 포함하는 장치
KR101244832B1 (ko) 인장 응력 및 압축 응력을 받은 반도체용 재료
JP7685006B2 (ja) ３ｄｎａｎｄ応用のためのメモリセルの製造
US20060228898A1 (en) Method and system for forming a high-k dielectric layer
US9799768B2 (en) Semiconductor device and method for manufacturing same
US20070066084A1 (en) Method and system for forming a layer with controllable spstial variation
CN101523558A (zh) 用于具有应变含锗层的器件的uv辅助电介质形成
JP2006173327A (ja) 薄膜トランジスタとその製造方法および製造装置
JP4977686B2 (ja) 平行電磁放射線を用いて薄膜内の引張応力を増大させる方法
US8119540B2 (en) Method of forming a stressed passivation film using a microwave-assisted oxidation process
US7807586B2 (en) Method of forming a stressed passivation film using a non-ionizing electromagnetic radiation-assisted oxidation process
US7579287B2 (en) Surface treatment method, manufacturing method of semiconductor device, and manufacturing method of capacitive element
CN101330022B (zh) 制作高张力薄膜的方法及机台
JP4995807B2 (ja) 酸窒化層を形成する方法及びシステム
US7517814B2 (en) Method and system for forming an oxynitride layer by performing oxidation and nitridation concurrently
JP5199954B2 (ja) 半導体装置の製造方法
CN101459075A (zh) 金属硅化物层及半导体器件的制造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090216

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20090216

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110621

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110817

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110906

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20111101

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20111129

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120224

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20120305

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120321

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120416

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150420

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees