Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
  • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
  • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
  • H10P14/6536—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
  • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
  • C23C16/34—Nitrides
  • C23C16/345—Silicon nitride
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/56—After-treatment
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W20/00—Interconnections in chips, wafers or substrates
  • H10W20/01—Manufacture or treatment
  • H10W20/071—Manufacture or treatment of dielectric parts thereof
  • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W20/00—Interconnections in chips, wafers or substrates
  • H10W20/01—Manufacture or treatment
  • H10W20/071—Manufacture or treatment of dielectric parts thereof
  • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
  • H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W20/00—Interconnections in chips, wafers or substrates
  • H10W20/01—Manufacture or treatment
  • H10W20/071—Manufacture or treatment of dielectric parts thereof
  • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
  • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
  • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
  • H10P14/6326—Deposition processes
  • H10P14/6328—Deposition from the gas or vapour phase
  • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
  • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
  • H10P14/6326—Deposition processes
  • H10P14/6328—Deposition from the gas or vapour phase
  • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
  • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
  • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
  • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
  • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
  • H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
  • H10P14/69—Inorganic materials
  • H10P14/694—Inorganic materials composed of nitrides
  • H10P14/6943—Inorganic materials composed of nitrides containing silicon
  • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
  • H10P72/04—Apparatus for manufacture or treatment
  • H10P72/0431—Apparatus for thermal treatment
  • H10P72/0436—Apparatus for thermal treatment mainly by radiation
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
  • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
  • H10P72/0602—Temperature monitoring

Definitions

• the present invention relates to semiconductor processing, and more particularly to a method and system for increasing tensile stress in a thin film.
• SiN films are widely used in semiconductor devices and ultra-large-scale integrated circuits.
• SiN films have been widely used in semiconductor devices as a diffusion barrier for dopants, as an etch-stop film during etching of fine features, as a final passivation film for encapsulation of fabricated devices, among many other uses.
• SiN films can be deposited at low pressure or at atmospheric pressure using a variety of processing systems and process gases. These processing systems can perform, for example, thermal chemical vapor deposition (TCVD), plasma-enhanced chemical vapor deposition (PECVD), or remote-PECVD, where in remote-PECVD the substrate to be processed is not placed in direct contact with the plasma but is placed down-stream of the plasma discharge, among others.
• TCVD thermal chemical vapor deposition
• PECVD plasma-enhanced chemical vapor deposition
• remote-PECVD where in remote-PECVD the substrate to be processed is not placed in direct contact with the plasma but is placed down-stream of the plasma discharge, among others.
• Device quality SiN films have been deposited, for example, by PECVD using silane (SiH 4 ) and ammonia (NH 3 ) or nitrogen (N 2 ) or thermal CVD using dichlorosilane (SiH 2 CI 2 ) and NH 3 .
• Deposited SiN films are often under stress.
• the stress can be either compressive or tensile, and can vary depending on the deposition process, gas mixture, deposition rate, substrate temperature, hydrogen content of the SiN film, ion bombardment or other process parameters.
• Tensile stress greater than about 1GPa has been observed for SiN films.
• ion bombardment of the SiN film can be used to densify films and induce more compressive stress.
• High tensile stress of a SiN passivation film can result in high stress between the SiN passivation film and the underlying substrate.
• NMOS negative metal oxide semiconductor
• a method and system are provided for forming high tensile stress SiN films.
• the method for increasing tensile stress of a nitride film includes providing a substrate comprising a SiN film containing hydrogen formed on the substrate, and exposing the SiN film to collimated electromagnetic radiation to anisotropically reduce the hydrogen content and increase the tensile stress of the SiN film.
• the processing system includes a processing chamber, a substrate holder disposed in the chamber, and an electromagnetic radiation source producing collimated electromagnetic radiation in the chamber to anisotropically irradiate a substrate on the substrate holder.
• the semiconductor device includes a substrate and a SiN film disposed on the substrate. The SiN film as disposed contains hydrogen. It is then exposed to collimated electromagnetic radiation to anisotropically reduce the hydrogen content and increase the tensile stress of the SiN film.
• FIG. 1 schematically shows a cross-sectional view of a MOS device containing a high tensile stress SiN film according to an embodiment of the invention
• FIG. 2 is a flow diagram for exposing a substrate to electromagnetic radiation according to an embodiment of the invention
• FIG. 3 is a flow diagram for exposing a substrate to collimated electromagnetic radiation according to another embodiment of the invention.
• FIG. 4 is a schematic diagram of a processing system according to an embodiment of the invention.
• FIG. 5 is a schematic diagram of a processing system according to another embodiment of the invention.
• FIG. 1 schematically shows of a cross-sectional view of a MOS device containing a SiN film according to an embodiment of the invention.
• the device 100 contains a substrate 112 having doped regions 113 and 114 (e.g., source and drain), a gate stack 120, a spacer 121 , and a SiN passivation film 122.
• the substrate 112 can, for example, contain Si, Ge, Si/Ge, or GaAs.
• the substrate (wafer) 112 can be of any size, for example, a 200 mm substrate, a 300 mm substrate, or an even larger substrate.
• the gate stack 120 contains a dielectric layer 116 over the channel region 1 15.
• the dielectric layer 116 can, for example, contain an oxide layer (e.g., SiO 2 ), a nitride layer (e.g., SiN x ), or an oxynitride layer (e.g., SiO x Ny), or a combination thereof or any other appropriate material.
• the dielectric layer 116 can further contain a high-dielectric constant (high-k) dielectric material.
• the high-k dielectric material can, for example, contain metal oxides and their silicates, including Ta 2 O 5 , TiO 2 , ZrO 2 , AI 2 O 3 , Y 2 O 3 , HfSiO x , HfO 2 , ZrO 2 , ZrSiOx, TaSiO x , SrO x , SrSiO x , LaO x , LaSiO x , YO x , or YSiO x , or combinations of two or more thereof.
• a conductive layer 1 17 is formed on the dielectric layer 116 and a suicide layer 118 is formed on the conductive layer 117 to reduce the electrical resistance of the conductive layer 116.
• the cap layer 119 is positioned on top of the gate stack 120 to protect the gate 120.
• the cap layer 119 can, for example, be SiN.
• the conductive layer 117 can be doped polysilicon, and the suicide layer 118 can be tungsten suicide.
• the gate stack 120 may be composed of different and fewer or more layers than are shown in FIG. 1.
• layer 117 and/or 118 may be replaced by a metal gate layer.
• FIG. 1 further shows the spacer 121 formed on either side of the gate 120 in order to protect the gate 120 from damage and ensure electrical performance of the gate.
• the spacer 121 can be used as a hard mask for the formation of the source and drain 112, 113 of the MOS device 100. Alternately, more than one spacer 121 may be used.
• the device 100 further contains a SiN passivation film 122 deposited onto the substrate 112. As those skilled in the art will appreciate, the SiN films can have various Si/N ratios.
• the deposited SiN passivation film 122 has a high hydrogen content. In one example, the hydrogen content can be between about 10 atomic percent and about 50 atomic percent.
• the hydrogen content can be between about 20 atomic percent and about 40 atomic percent.
• the deposited SiN passivation film 122 can have high tensile stress, for example about 1GPa, or higher. Such films can be formed employing Low-Pressure Chemical Vapor Deposition (LPCVD). See U.S.
• Patent 6,429,1305 the contents of which are incorporated herein by reference
• such films can be formed employing atmospheric pressure remote- PECVD using a process gas including nitrogen, helium and silane at a substrate temperature of around 100° to 500 0 C
• a process gas including nitrogen, helium and silane at a substrate temperature of around 100° to 500 0 C
• Embodiments of the invention provide a method for reducing the hydrogen content and increasing the tensile stress of the SiN passivation film 122
• the increased tensile stress can induce tensile strain in the channel of a MOS structure (e g , channel 115 in FIG 1), thereby increasing electron mobility and the speed of the device 100
• the MOS device 100 is exposed to electromagnetic radiation 124 to reduce the hydrogen content and increase the tensile stress of the SiN passivation film 122
• Electromagnetic radiation includes radiant energy in the form of photons, including, in the order of decreasing energy, gamma radiation, X-rays, ultraviolet radiation (UV) 1 visible light, infrared energy, microwave radiation, and radio waves
• exposure of the device 100 to the electromagnetic radiation 124 reduces the hydrogen content of the SiN film 122, thereby increasing the tensile stress of the SiN film 122
• the exposure can be combined with annealing of the device 100, i e , the annealing can be performed before, during, and/or after the exposure
• the electromagnetic radiation 124 can be multi-frequency electromagnetic radiation with frequencies corresponding to wavelengths less than about 500 nm
• the electromagnetic radiation can include wavelengths between about 500 nm and about 125 nm
• the electromagnetic radiation can include wavelengths in the ultraviolet range
• a single frequency electromagnetic radiation source may be employed Examples of radiation sources that can be employed to generate the single frequency electromagnetic radiation, or components of the multi-frequency electromagnetic radiation, include Xe (172 nm), KrCI (222 nm), KrF (248 nm), F 2 (157 nm), ArF (193 nm), KrF (248 nm), XeCI (308 nm) or XeF (351 nm) excimer lamps
• the electromagnetic radiation 124 can be diffuse radiation that is nearly isotropic ( ⁇ e , not strongly directional) Exposure of the device 100 to diffuse radiation reduces the hydrogen content of the SiN film 122 substantially isotropically, thereby non- selectively increasing the tensile stress of the horizontal and vertical areas of the SiN film 122
• FIG 4 A processing system configured for exposing a substrate to diffuse radiation is depicted in FIG 4 (discussed in more detail below)
• a blanket SiN film containing hydrogen on an unpatterned substrate was exposed to diffuse electromagnetic radiation of 50 mW/cm 2 with a wavelength of 172 nm
• the tensile stress of the SiN film increased from about 1 2 GPa to about 1 6 GPa upon exposure to the electromagnetic radiation
• the electromagnetic radiation 124 can be collimated radiation, i e , radiation in which all electromagnetic rays from the radiation source are substantially parallel to each other Exposure of the device 100 to radiation collimated in the vertical direction reduces the hydrogen content of the SiN film 122 substantially non- isotropically, thereby selectively increasing the tensile stress of the horizontal areas of the SiN film 122 compared to the vertical areas of the SiN film 122 A processing system configured for exposing a substrate to collimated radiation is depicted in FIG 5 (discussed in more detail below)
• FIG 2 is a flow diagram for exposing a substrate to multi-frequency electromagnetic radiation according to an embodiment of the invention
• the process 200 includes, at 202, providing a substrate comprising a SiN film containing hydrogen formed on the substrate
• the SiN film is exposed to multi-frequency electromagnetic radiation to reduce the hydrogen content and increase the tensile stress of the SiN film
• the exposure can be performed under predetermined processing conditions for a time period that results in a desired removal of hydrogen and the desired tensile stress of the SiN film.
• a process recipe for removal of the hydrogen can be determined by direct experimentation and/or design of experiments (DOE).
• DOE design of experiments
• FIG. 3 is a flow diagram for processing a gate stack according to an embodiment of the invention.
• the process 300 includes, at 302, providing a substrate comprising a SiN film containing hydrogen formed on the substrate.
• the SiN film is exposed to collimated electromagnetic radiation to anisotropically reduce the hydrogen content and increase the tensile stress of the SiN film.
• the exposure can be performed under predetermined processing conditions for a time period that results in a desired anisotropic removal of hydrogen and desired tensile stress of the SiN film.
• a process recipe for removal of the hydrogen can be determined by direct experimentation and/or design of experiments (DOE).
• DOE design of experiments
• the processes 200 and 300 described in FIGS. 2 and 3 may further contain an annealing step for annealing the substrate before, during, and/or following the exposure of the SiN film to the electromagnetic radiation.
• the annealing step can, for example, be performed to further reduce the hydrogen content of the SiN film.
• the annealing temperature can, for example, be between about 200°C and about 1000 0 C. Alternately the annealing temperature can be between about 400 0 C and about 700 0 C.
• each of the steps or stages in the flowchart of FIGS. 2 and 3 may encompass one or more separate operations.
• process 200 may be employed on a gate stack structure or any other structure, just as process 300 can be employed on any substrate or structure.
• Stages 202 and 204 or stages 302 and 304 can be repeated as many times as desired to develop a SiN film of any thickness.
• stages 202 and 204 or stages 302 or 304 may be employed to provide a SiN film having a thickness of about 10 Angstroms to about 50 Angstroms.
• Stages 202 and 204 or stages 302 and 304 can then be repeated to deposit a second SiN film having a thickness of about 10 Angstroms to about 50 Angstroms.
• a SiN film can be built to any desired thickness, e.g., about 100 Angstroms to about 1 micron.
• FIG. 4 is a schematic diagram of a processing system according to an embodiment of the invention.
• the processing system 1 contains a process chamber 10 having a substrate holder 20 configured to support a substrate 25 containing a SiN film.
• the process chamber 10 further contains an electromagnetic radiation assembly 30 for exposing the substrate 25 to electromagnetic radiation.
• the processing system 1 contains a power source 50 coupled to the electromagnetic radiation assembly 30, and a substrate temperature control system 60 coupled to substrate holder 20 and configured to control the temperature of substrate 25.
• a gas supply system 40 is coupled to the process chamber 10 and configured to introduce a process gas to process chamber 10.
• the process gas can comprise an inert gas, such nitrogen or a noble gas (i.e., helium, neon, argon, xenon, krypton). Alternatively, no process gas may be employed.
• the electromagnetic radiation assembly 30 in FIG. 4 is configured to expose the substrate 25 to diffuse radiation 45 that is nearly isotropic (i.e., not strongly directional). In other words, the diffuse radiation 45 is not predominantly incident to the substrate 25 from any particular direction.
• Electromagnetic radiation assemblies capable of producing diffuse radiation are well known to those skilled in the art.
• the electromagnetic radiation assembly 30 can be capable of generating an output between about 10 mW/cm 2 and about 1000 mW/cm 2 .
• the output can be between about 50 mW/cm 2 and about 500 mW/cm 2 .
• the wavelength of the electromagnetic radiation 45 can be below about 500 nm.
• the wavelength can be between about 500 nm and about 125 nm.
• Temperature control system 60 comprises temperature control elements, such as a recirculating coolant system that, when cooling, receives heat from substrate holder 20 and transfers heat to a heat exchanger system (not shown), or when heating, transfers heat from the heat exchanger system. Additionally, the temperature control elements can include heating/cooling elements, such as resistive heating elements, or thermo-electric heaters/coolers, which can be provided in the substrate holder 20, as well as the chamber wall of the process chamber 10 and any other component within the processing system 1.
• temperature control elements such as a recirculating coolant system that, when cooling, receives heat from substrate holder 20 and transfers heat to a heat exchanger system (not shown), or when heating, transfers heat from the heat exchanger system.
• the temperature control elements can include heating/cooling elements, such as resistive heating elements, or thermo-electric heaters/coolers, which can be provided in the substrate holder 20, as well as the chamber wall of the process chamber 10 and any other component within the processing system 1.
• the substrate holder 20 can include a mechanical clamping system, or an electrical clamping system, such as an electrostatic clamping system, to affix substrate 25 to an upper surface of substrate holder 20.
• substrate holder 20 can further include a substrate backside gas delivery system configured to introduce gas to the back-side of substrate 25 in order to improve the gas-gap thermal conductance between substrate 25 and substrate holder 20.
• a substrate backside gas delivery system configured to introduce gas to the back-side of substrate 25 in order to improve the gas-gap thermal conductance between substrate 25 and substrate holder 20.
• the substrate backside gas system can comprise a two-zone gas distribution system, wherein the helium gas gap pressure can be independently varied between the center and the edge of substrate 25.
• the process chamber 10 can be further coupled to a pressure control system 32, including, for example, a vacuum pumping system 34 and a valve 36, through a duct 38, wherein the pressure control system 34 is configured to controllably evacuate the process chamber 10 to a pressure suitable for forming the thin film on substrate 25, and suitable for use of the first and second process materials.
• a pressure control system 32 including, for example, a vacuum pumping system 34 and a valve 36, through a duct 38, wherein the pressure control system 34 is configured to controllably evacuate the process chamber 10 to a pressure suitable for forming the thin film on substrate 25, and suitable for use of the first and second process materials.
• the vacuum pumping system 34 can include a turbo-molecular vacuum pump (TMP) capable of a pumping speed up to about 5000 liters per second (and greater) and valve 36 can include a gate valve for throttling the chamber pressure.
• TMP turbo-molecular vacuum pump
• valve 36 can include a gate valve for throttling the chamber pressure.
• TMP turbo-molecular vacuum pump
• a 1000 to 3000 liter per second TMP is generally employed.
• a device for monitoring chamber pressure (not shown) can be coupled to the processing chamber 10.
• the pressure measuring device can be, for example, a Type 628B Baratron absolute capacitance manometer commercially available from MKS Instruments, Inc. (Andover, MA).
• the processing system 1 contains a controller 70 coupled to the process chamber 10, substrate holder 20, electromagnetic radiation assembly 30, power source 50, and substrate temperature control system 60.
• controller 70 can be coupled to a one or more additional controllers/computers (not shown), and controller 70 can obtain setup and/or configuration information from an additional controller/computer.
• processing system 1 can comprise any number of processing elements having any number of controllers associated with them in addition to independent processing elements.
• the controller 70 can be used to configure any number of processing elements (10, 20, 30, 50, and 60), and the controller 70 can collect, provide, process, store, and display data from processing elements.
• the controller 70 can comprise a number of applications for controlling one or more of the processing elements.
• controller 70 can include a graphic user interface (GUI) component (not shown) that can provide easy to use interfaces that enable a user to monitor and/or control one or more processing elements.
• GUI graphic user interface
• Controller 70 can comprise a microprocessor, memory, and a digital I/O port capable of generating control voltages sufficient to communicate and activate inputs to processing system 1 as well as monitor outputs from processing system 1.
• a program stored in the memory may be utilized to activate the inputs to the aforementioned components of the processing system 1 according to a process recipe in order to perform process.
• One example of the controller 70 is a DELL PRECISION WORKSTATION 610TM, available from Dell Corporation, Austin, Texas.
• the controller 70 may be locally located relative to the processing system 1 , or it may be remotely located relative to the processing system 1.
• the controller 70 may exchange data with the deposition 1 using at least one of a direct connection, an intranet, the Internet and a wireless connection.
• the controller 70 may be coupled to an intranet at, for example, a customer site (i.e., a device maker, etc.), or it may be coupled to an intranet at, for example, a vendor site (i.e., an equipment manufacturer). Additionally, for example, the controller 60 may be coupled to the Internet. Furthermore, another computer (i.e., controller, server, etc.) may access, for example, the controller 70 to exchange data via at least one of a direct connection, an intranet, and the Internet. As also would be appreciated by those skilled in the art, the controller 70 may exchange data with the processing system 1 via a wireless connection.
• a customer site i.e., a device maker, etc.
• a vendor site i.e., an equipment manufacturer
• the controller 60 may be coupled to the Internet.
• another computer i.e., controller, server, etc.
• the controller 70 may exchange data with the processing system 1 via a wireless connection.
• the processing conditions can further include a substrate temperature between about O 0 C and about 1000 0 C.
• the substrate temperature can be between about 200°C and about 1000 0 C 1 or between about 400°C and about 700 0 C.
• the pressure in the process chamber 10 can, for example, be maintained between about 10 "5 Torr or even lower and about 3000 mTorr. Alternately, the pressure can be maintained between about 20 mTorr and about 1000 mTorr. Yet alternately, the pressure can be maintained between about 50 mTorr and about 500 mTorr. At very low pressure, e.g., about 10 '5 Torr or even lower, the process can employ a process gas. Alternatively, a process gas is not necessary.
• FIG. 5 is a schematic diagram of a processing system according to an embodiment of the invention.
• the processing system 2 depicted in FIG. 5 is similar to the processing system 1 depicted in FIG. 4 but contains an electromagnetic radiation assembly 31 configured to form and expose the substrate 25 to collimated radiation 46 having electromagnetic rays that are substantially parallel to each other.
• Electromagnetic radiation assemblies capable of producing collimated radiation are well known to those skilled in the art.
• the collimated radiation 46 can be formed by collimating diffuse radiation from one or more radiation sources housed in the electromagnetic radiation assembly 31 using a condenser lens, or other devices such as one or more baffles.
• the electromagnetic radiation assembly 31 can be capable of generating an output between about 10 mW/cm 2 and about 1000 mW/cm 2 .
• the output can be between about 50 mW/cm 2 and about 500 mW/cm 2 .
• the wavelength of the electromagnetic radiation 45 can be below about 500 nm.
• the wavelength can be between about 275 nm and about 125 nm.

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• Mechanical Engineering (AREA)
• Metallurgy (AREA)
• Organic Chemistry (AREA)
• Inorganic Chemistry (AREA)
• Insulated Gate Type Field-Effect Transistor (AREA)
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• Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

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• 2005
  • 2005-03-29 US US11/091,756 patent/US7265066B2/en not_active Expired - Fee Related
• 2006
  • 2006-02-16 WO PCT/US2006/005419 patent/WO2006104582A2/en not_active Ceased
  • 2006-02-16 JP JP2008504043A patent/JP4977686B2/ja not_active Expired - Fee Related
  • 2006-03-24 TW TW095110366A patent/TWI332256B/zh not_active IP Right Cessation

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