JP4961525B2 - 低ノイズ遅延回路を有する電子回路 - Google Patents
低ノイズ遅延回路を有する電子回路 Download PDFInfo
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- JP4961525B2 JP4961525B2 JP2008546728A JP2008546728A JP4961525B2 JP 4961525 B2 JP4961525 B2 JP 4961525B2 JP 2008546728 A JP2008546728 A JP 2008546728A JP 2008546728 A JP2008546728 A JP 2008546728A JP 4961525 B2 JP4961525 B2 JP 4961525B2
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- delay stage
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- 230000002596 correlated effect Effects 0.000 claims abstract description 17
- 230000000694 effects Effects 0.000 abstract description 12
- 230000010354 integration Effects 0.000 abstract description 11
- 230000007704 transition Effects 0.000 abstract 1
- 230000010355 oscillation Effects 0.000 description 9
- 239000003990 capacitor Substances 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000013459 approach Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000875 corresponding effect Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000011165 process development Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/354—Astable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K4/00—Generating pulses having essentially a finite slope or stepped portions
- H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
- H03K4/08—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
- H03K4/48—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
- H03K4/50—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor
- H03K4/501—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor the starting point of the flyback period being determined by the amplitude of the voltage across the capacitor, e.g. by a comparator
- H03K4/502—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor the starting point of the flyback period being determined by the amplitude of the voltage across the capacitor, e.g. by a comparator the capacitor being charged from a constant-current source
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Pulse Circuits (AREA)
- Details Of Television Scanning (AREA)
Description
Claims (8)
- 鋸歯状波遅延段のチェインと相関回路とを備えた遅延回路を備えている電子回路において、
前記鋸歯状波遅延段の各々が、積分回路と、前記積分回路と前記相関回路のそれぞれの電流出力との間に結合された電流変調器とを備え、前記チェイン内に連続する前記鋸歯状波遅延段の各々の前記電流変調器が、基準入力と、前記チェイン内の当該鋸歯状波遅延段の前にある前記鋸歯状波遅延段の前記積分回路の出力に結合されてチェインをなす入力とを有し、前記相関回路が、前記鋸歯状波遅延段の各々の前記電流変調器の前記基準入力に結合され、前記相関回路が、前記電流出力の各々から電流を発生し、かつ少なくとも部分的に共通基準電流源から、前記鋸歯状波遅延段の各々の前記基準入力における基準電圧を発生するように構成され、前記電流と前記基準電圧とは互いに相関があることを特徴とする電子回路。 - 前記相関回路の前記電流出力の少なくとも1つに結合された前記電流変調器が分流回路を備え、前記分流回路は、前記相関回路の前記電流出力に結合された入力と、前記積分回路に結合された第1出力と、抵抗に結合された第2出力とを有し、前記電流変調器が、前記チェインをなす入力と前記基準入力との間の電圧差の制御下で、前記第1出力を通る電流と前記第2出力を通る電流との比率を変調するように構成され、前記第2出力と前記抵抗との間のノードが、前記鋸歯状波遅延段の第1遅延段の前記基準入力に結合されていることを特徴とする請求項1に記載の電子回路。
- 前記電流出力の前記少なくとも1つに結合された前記電流変調器が、前記鋸歯状波遅延段のうちの第1遅延段以外の第2遅延段の電流変調器であることを特徴とする請求項2に記載の電子回路。
- 前記鋸歯状波遅延段の各々の前記電流変調器が分流回路を備え、前記分流回路は、前記相関回路の前記それぞれの電流出力に結合された電流入力と、当該鋸歯状波遅延段の前記積分回路に結合された第1出力と、当該鋸歯状波遅延段の抵抗に結合された第2出力とを有し、前記電流変調器が、前記チェインをなす入力と前記基準入力との間の電圧差の制御下で、前記第1出力を通る電流と前記第2出力を通る電流との比率を変調するように構成され、前記鋸歯状波遅延段は発振器ループの形に結合され、前記鋸歯状波遅延段の各々の前記第2出力と前記抵抗と間のノードが、当該鋸歯状波遅延段とは異なる前記鋸歯状波遅延段の前記基準入力に結合されていることを特徴とする請求項1に記載の電子回路。
- 前記電流出力の少なくとも1つが、前記鋸歯状波遅延段の前記第1遅延段に結合されていることを特徴とする請求項2に記載の電子回路。
- 前記相関回路が、基準電流源と電流ミラー回路とを備え、前記電流ミラー回路は、前記基準電流源に結合された電流ミラー入力と複数の電流ミラー出力とを備え、前記複数の電流ミラー出力は、前記鋸歯状波遅延段のそれぞれの前記電流変調器に結合された前記電流出力を形成することを特徴とする請求項1に記載の電子回路。
- 前記電流ミラーの他の前記電流ミラー出力に結合された抵抗を備え、前記抵抗と前記他の電流ミラー出力との間のノードが、前記前記鋸歯状波遅延段の前記第1遅延段の前記基準入力に結合されていることを特徴とする請求項6に記載の電子回路。
- 前記鋸歯状波遅延段が発振器ループの形に結合されていることを特徴とする請求項1に記載の電子回路。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05112458 | 2005-12-20 | ||
EP05112458.4 | 2005-12-20 | ||
PCT/IB2006/054784 WO2007072307A1 (en) | 2005-12-20 | 2006-12-12 | Electronic circuit with low noise delay circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009520426A JP2009520426A (ja) | 2009-05-21 |
JP4961525B2 true JP4961525B2 (ja) | 2012-06-27 |
Family
ID=37989084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008546728A Active JP4961525B2 (ja) | 2005-12-20 | 2006-12-12 | 低ノイズ遅延回路を有する電子回路 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7570097B2 (ja) |
EP (1) | EP1966889B1 (ja) |
JP (1) | JP4961525B2 (ja) |
CN (1) | CN101341655B (ja) |
AT (1) | ATE532262T1 (ja) |
WO (1) | WO2007072307A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8368379B2 (en) * | 2010-03-04 | 2013-02-05 | Maxim Integrated Products, Inc. | Apparatus and method for monitoring output within a power strip |
CN107681994B (zh) * | 2017-09-23 | 2020-11-17 | 深圳大学 | 一种振荡器电路 |
CN108718194B (zh) * | 2018-08-01 | 2023-11-03 | 灿芯半导体(上海)股份有限公司 | Ddr接收器用参考电平电路 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL8701831A (nl) * | 1987-08-04 | 1989-03-01 | Philips Nv | Oscillator met frekwentiestabilisatiemiddelen. |
JP3304539B2 (ja) * | 1993-08-31 | 2002-07-22 | 富士通株式会社 | 基準電圧発生回路 |
US5576647A (en) * | 1995-06-22 | 1996-11-19 | Marvell Technology Group, Ltd. | Charge pump for phase lock loop |
JPH09331236A (ja) | 1996-06-12 | 1997-12-22 | Mitsubishi Electric Corp | 電圧制御発振器および電圧制御発振器を有する非接触icカード |
EP1018213A2 (en) | 1998-04-09 | 2000-07-12 | Koninklijke Philips Electronics N.V. | Coupled sawtooth oscillator |
JP2000013204A (ja) * | 1998-06-18 | 2000-01-14 | Fujitsu Ltd | 遅延回路及び該遅延回路を用いた発振回路 |
JP2004356800A (ja) * | 2003-05-28 | 2004-12-16 | Rohm Co Ltd | 発振回路 |
US6956442B2 (en) | 2003-09-11 | 2005-10-18 | Xilinx, Inc. | Ring oscillator with peaking stages |
-
2006
- 2006-12-12 US US12/158,315 patent/US7570097B2/en active Active
- 2006-12-12 WO PCT/IB2006/054784 patent/WO2007072307A1/en active Application Filing
- 2006-12-12 CN CN2006800479433A patent/CN101341655B/zh active Active
- 2006-12-12 EP EP06842462A patent/EP1966889B1/en active Active
- 2006-12-12 JP JP2008546728A patent/JP4961525B2/ja active Active
- 2006-12-12 AT AT06842462T patent/ATE532262T1/de active
Also Published As
Publication number | Publication date |
---|---|
EP1966889A1 (en) | 2008-09-10 |
US20090051399A1 (en) | 2009-02-26 |
CN101341655A (zh) | 2009-01-07 |
EP1966889B1 (en) | 2011-11-02 |
ATE532262T1 (de) | 2011-11-15 |
WO2007072307A1 (en) | 2007-06-28 |
CN101341655B (zh) | 2012-07-04 |
US7570097B2 (en) | 2009-08-04 |
JP2009520426A (ja) | 2009-05-21 |
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