JP4940064B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP4940064B2
JP4940064B2 JP2007221199A JP2007221199A JP4940064B2 JP 4940064 B2 JP4940064 B2 JP 4940064B2 JP 2007221199 A JP2007221199 A JP 2007221199A JP 2007221199 A JP2007221199 A JP 2007221199A JP 4940064 B2 JP4940064 B2 JP 4940064B2
Authority
JP
Japan
Prior art keywords
chip
semiconductor chip
circuit
analog
driver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2007221199A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009054850A (ja
JP2009054850A5 (https=
Inventor
信也 小池
真也 永田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2007221199A priority Critical patent/JP4940064B2/ja
Priority to US12/197,938 priority patent/US8362626B2/en
Publication of JP2009054850A publication Critical patent/JP2009054850A/ja
Publication of JP2009054850A5 publication Critical patent/JP2009054850A5/ja
Application granted granted Critical
Publication of JP4940064B2 publication Critical patent/JP4940064B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/811—Multiple chips on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77—Auxiliary members characterised by their shape
    • H10W40/778—Auxiliary members characterised by their shape in encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/752—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2007221199A 2007-08-28 2007-08-28 半導体装置 Active JP4940064B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007221199A JP4940064B2 (ja) 2007-08-28 2007-08-28 半導体装置
US12/197,938 US8362626B2 (en) 2007-08-28 2008-08-25 Semiconductor device with non-overlapped circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007221199A JP4940064B2 (ja) 2007-08-28 2007-08-28 半導体装置

Publications (3)

Publication Number Publication Date
JP2009054850A JP2009054850A (ja) 2009-03-12
JP2009054850A5 JP2009054850A5 (https=) 2010-10-07
JP4940064B2 true JP4940064B2 (ja) 2012-05-30

Family

ID=40406166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007221199A Active JP4940064B2 (ja) 2007-08-28 2007-08-28 半導体装置

Country Status (2)

Country Link
US (1) US8362626B2 (https=)
JP (1) JP4940064B2 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9105462B2 (en) 2013-03-01 2015-08-11 Kabushiki Kaisha Toshiba Semiconductor apparatus
US9312236B2 (en) 2013-03-01 2016-04-12 Kabushiki Kaisha Toshiba Semiconductor device, wireless device, and storage device

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101505551B1 (ko) * 2007-11-30 2015-03-25 페어차일드코리아반도체 주식회사 온도 감지소자가 장착된 반도체 파워 모듈 패키지 및 그제조방법
JP5405785B2 (ja) * 2008-09-19 2014-02-05 ルネサスエレクトロニクス株式会社 半導体装置
JP5685898B2 (ja) * 2010-01-08 2015-03-18 ソニー株式会社 半導体装置、固体撮像装置、およびカメラシステム
KR20120024099A (ko) * 2010-09-06 2012-03-14 삼성전자주식회사 멀티-칩 패키지 및 그의 제조 방법
TW201320263A (zh) * 2011-11-11 2013-05-16 南茂科技股份有限公司 加強散熱的封裝結構
WO2013080426A1 (ja) 2011-12-01 2013-06-06 パナソニック株式会社 熱を考慮した構造を持つ集積回路装置、三次元集積回路、三次元プロセッサ装置、及びプロセススケジューラ
US10461799B2 (en) * 2012-11-08 2019-10-29 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated transmitter and receiver front end module, transceiver, and related method
JP6293562B2 (ja) * 2014-04-17 2018-03-14 株式会社不二工機 圧力センサ
WO2016007188A1 (en) 2014-07-07 2016-01-14 Bayer Healthcare Llc Improved device pairing taking into account at least one condition
JP6420617B2 (ja) 2014-09-30 2018-11-07 ルネサスエレクトロニクス株式会社 半導体装置
US10049969B1 (en) * 2017-06-16 2018-08-14 Allegro Microsystems, Llc Integrated circuit
JP6996385B2 (ja) * 2018-03-28 2022-01-17 住友電気工業株式会社 増幅器
DE102020106492A1 (de) * 2019-04-12 2020-10-15 Infineon Technologies Ag Chip -package, verfahren zum bilden eines chip -packages, halbleitervorrichtung, halbleiteranordnung, dreiphasensystem, verfahren zum bilden einer halbleitervorrichtung und verfahren zum bilden einer halbleiteranordnung
US11335383B2 (en) 2019-05-31 2022-05-17 Micron Technology, Inc. Memory component for a system-on-chip device
US11379398B2 (en) * 2019-06-04 2022-07-05 Microchip Technology Incorporated Virtual ports for connecting core independent peripherals
JP7574637B2 (ja) * 2020-12-18 2024-10-29 株式会社村田製作所 半導体装置及び半導体モジュール
CN116341461A (zh) * 2022-12-13 2023-06-27 湖北久之洋信息科技有限公司 一种模拟图像信号采集sip芯片

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3786314D1 (de) * 1986-09-23 1993-07-29 Siemens Ag Halbleiterbauelemente mit leistungs-mosfet und steuerschaltung.
US5644167A (en) * 1996-03-01 1997-07-01 National Semiconductor Corporation Integrated circuit package assemblies including an electrostatic discharge interposer
EP0890989A4 (en) * 1997-01-24 2006-11-02 Rohm Co Ltd SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
JP3371240B2 (ja) 1997-12-02 2003-01-27 ローム株式会社 樹脂パッケージ型半導体装置
JP3737333B2 (ja) * 2000-03-17 2006-01-18 沖電気工業株式会社 半導体装置
US6472747B2 (en) * 2001-03-02 2002-10-29 Qualcomm Incorporated Mixed analog and digital integrated circuits
JP2003031736A (ja) * 2001-07-13 2003-01-31 Hitachi Ltd 半導体装置およびその製造方法
JP2003133512A (ja) * 2002-08-12 2003-05-09 Rohm Co Ltd 樹脂パッケージ型半導体装置
JP2004165269A (ja) * 2002-11-11 2004-06-10 Canon Inc 積層形半導体装置
JP2004296613A (ja) * 2003-03-26 2004-10-21 Renesas Technology Corp 半導体装置
JP4366472B2 (ja) * 2003-11-19 2009-11-18 Ｏｋｉセミコンダクタ株式会社 半導体装置
TWI307830B (en) * 2005-03-25 2009-03-21 Delta Electronics Inc Heat dissipation device
JP4748648B2 (ja) * 2005-03-31 2011-08-17 ルネサスエレクトロニクス株式会社 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9105462B2 (en) 2013-03-01 2015-08-11 Kabushiki Kaisha Toshiba Semiconductor apparatus
US9312236B2 (en) 2013-03-01 2016-04-12 Kabushiki Kaisha Toshiba Semiconductor device, wireless device, and storage device

Also Published As

Publication number Publication date
JP2009054850A (ja) 2009-03-12
US8362626B2 (en) 2013-01-29
US20090057915A1 (en) 2009-03-05

Similar Documents

Publication Publication Date Title
JP4940064B2 (ja) 半導体装置
US9209113B2 (en) Semiconductor device for battery power voltage control
US7298033B2 (en) Stack type ball grid array package and method for manufacturing the same
US7482699B2 (en) Semiconductor device
US8885356B2 (en) Enhanced stacked microelectronic assemblies with central contacts and improved ground or power distribution
US6781240B2 (en) Semiconductor package with semiconductor chips stacked therein and method of making the package
US7202554B1 (en) Semiconductor package and its manufacturing method
US10582617B2 (en) Method of fabricating a circuit module
EP1911092B1 (en) Integrated circuit packaging
US20090302483A1 (en) Stacked die package
US20040018662A1 (en) Method of manufacturing a semiconductor device
US8283757B2 (en) Quad flat package with exposed common electrode bars
US7893539B2 (en) Semiconductor apparatus and mobile apparatus
US6753597B1 (en) Encapsulated semiconductor package including chip paddle and leads
US10366934B2 (en) Face down dual sided chip scale memory package
JP5193611B2 (ja) 半導体装置
US8269334B1 (en) Multichip package leadframe including electrical bussing
KR100381839B1 (ko) 반도체패키지
JPH06224253A (ja) 半導体装置
KR20060006397A (ko) 반도체 패키지
KR20080020133A (ko) 다이 스택 패키지

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20100528

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100825

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100825

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120124

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120131

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120227

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150302

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4940064

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350