JP4901729B2 - ナノクラスタ電荷蓄積デバイスの形成方法 - Google Patents

ナノクラスタ電荷蓄積デバイスの形成方法 Download PDF

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Publication number
JP4901729B2
JP4901729B2 JP2007518064A JP2007518064A JP4901729B2 JP 4901729 B2 JP4901729 B2 JP 4901729B2 JP 2007518064 A JP2007518064 A JP 2007518064A JP 2007518064 A JP2007518064 A JP 2007518064A JP 4901729 B2 JP4901729 B2 JP 4901729B2
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region
layer
charge storage
semiconductor device
gate
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Japanese (ja)
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JP2008504681A (ja
JP2008504681A5 (enExample
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エフ． シュタイムル、ロバート
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NXP USA Inc
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NXP USA Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/962—Quantum dots and lines

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
JP2007518064A 2004-06-25 2005-05-11 ナノクラスタ電荷蓄積デバイスの形成方法 Expired - Fee Related JP4901729B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/876,805 US7091089B2 (en) 2004-06-25 2004-06-25 Method of forming a nanocluster charge storage device
US10/876,805 2004-06-25
PCT/US2005/016495 WO2006007080A2 (en) 2004-06-25 2005-05-11 Method of forming a nanocluster charge storage device

Publications (3)

Publication Number Publication Date
JP2008504681A JP2008504681A (ja) 2008-02-14
JP2008504681A5 JP2008504681A5 (enExample) 2008-06-26
JP4901729B2 true JP4901729B2 (ja) 2012-03-21

Family

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Family Applications (1)

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JP2007518064A Expired - Fee Related JP4901729B2 (ja) 2004-06-25 2005-05-11 ナノクラスタ電荷蓄積デバイスの形成方法

Country Status (5)

Country Link
US (1) US7091089B2 (enExample)
JP (1) JP4901729B2 (enExample)
CN (1) CN100524657C (enExample)
TW (1) TWI396238B (enExample)
WO (1) WO2006007080A2 (enExample)

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* Cited by examiner, † Cited by third party
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US7361543B2 (en) * 2004-11-12 2008-04-22 Freescale Semiconductor, Inc. Method of forming a nanocluster charge storage device
US7183159B2 (en) * 2005-01-14 2007-02-27 Freescale Semiconductor, Inc. Method of forming an integrated circuit having nanocluster devices and non-nanocluster devices
US20060199335A1 (en) * 2005-03-04 2006-09-07 Freescale Semiconductor, Inc. Electronic devices including non-volatile memory structures and processes for forming the same
JP2006319294A (ja) * 2005-05-11 2006-11-24 Hynix Semiconductor Inc 半導体素子の高電圧用ゲート酸化膜形成方法及び半導体素子の高電圧用トランジスタ
US7432158B1 (en) 2006-07-25 2008-10-07 Freescale Semiconductor, Inc. Method for retaining nanocluster size and electrical characteristics during processing
US7445984B2 (en) 2006-07-25 2008-11-04 Freescale Semiconductor, Inc. Method for removing nanoclusters from selected regions
US7816211B2 (en) * 2007-01-26 2010-10-19 Freescale Semiconductor, Inc. Method of making a semiconductor device having high voltage transistors, non-volatile memory transistors, and logic transistors
US9299568B2 (en) 2007-05-25 2016-03-29 Cypress Semiconductor Corporation SONOS ONO stack scaling
US8614124B2 (en) 2007-05-25 2013-12-24 Cypress Semiconductor Corporation SONOS ONO stack scaling
US9431549B2 (en) 2007-12-12 2016-08-30 Cypress Semiconductor Corporation Nonvolatile charge trap memory device having a high dielectric constant blocking region
US7799634B2 (en) * 2008-12-19 2010-09-21 Freescale Semiconductor, Inc. Method of forming nanocrystals
US7871886B2 (en) * 2008-12-19 2011-01-18 Freescale Semiconductor, Inc. Nanocrystal memory with differential energy bands and method of formation
US9102522B2 (en) 2009-04-24 2015-08-11 Cypress Semiconductor Corporation Method of ONO integration into logic CMOS flow
US8071453B1 (en) 2009-04-24 2011-12-06 Cypress Semiconductor Corporation Method of ONO integration into MOS flow
US8383479B2 (en) 2009-07-21 2013-02-26 Sandisk Technologies Inc. Integrated nanostructure-based non-volatile memory fabrication
CN102456629A (zh) * 2010-10-19 2012-05-16 上海宏力半导体制造有限公司 存储器件的形成方法
US9230977B2 (en) 2013-06-21 2016-01-05 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded flash memory device with floating gate embedded in a substrate
US8883624B1 (en) 2013-09-27 2014-11-11 Cypress Semiconductor Corporation Integration of a memory transistor into high-K, metal gate CMOS process flow
KR102258369B1 (ko) * 2014-06-23 2021-05-31 삼성전자주식회사 수직형 메모리 장치 및 이의 제조 방법
TW201825384A (zh) * 2016-08-22 2018-07-16 國立研究開發法人科學技術振興機構 記憶組件
US20230335582A1 (en) * 2022-04-13 2023-10-19 Micron Technology, Inc. Memory device isolation structure and method

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4538693B2 (ja) * 1998-01-26 2010-09-08 ソニー株式会社 メモリ素子およびその製造方法
US6339002B1 (en) 1999-02-10 2002-01-15 International Business Machines Corporation Method utilizing CMP to fabricate double gate MOSFETS with conductive sidewall contacts
US6320784B1 (en) 2000-03-14 2001-11-20 Motorola, Inc. Memory cell and method for programming thereof
US6297095B1 (en) 2000-06-16 2001-10-02 Motorola, Inc. Memory device that includes passivated nanoclusters and method for manufacture
KR100357692B1 (ko) * 2000-10-27 2002-10-25 삼성전자 주식회사 비휘발성 메모리소자 및 그 제조방법
US6444545B1 (en) 2000-12-19 2002-09-03 Motorola, Inc. Device structure for storing charge and method therefore
JP4713752B2 (ja) * 2000-12-28 2011-06-29 財団法人国際科学振興財団 半導体装置およびその製造方法
TW546840B (en) * 2001-07-27 2003-08-11 Hitachi Ltd Non-volatile semiconductor memory device
US6580132B1 (en) 2002-04-10 2003-06-17 International Business Machines Corporation Damascene double-gate FET
JP2003309182A (ja) * 2002-04-17 2003-10-31 Hitachi Ltd 半導体装置の製造方法及び半導体装置
US7189606B2 (en) 2002-06-05 2007-03-13 Micron Technology, Inc. Method of forming fully-depleted (FD) SOI MOSFET access transistor
US6888739B2 (en) * 2002-06-21 2005-05-03 Micron Technology Inc. Nanocrystal write once read only memory for archival storage
JP2004153037A (ja) * 2002-10-31 2004-05-27 Renesas Technology Corp 半導体装置の製造方法
JP4477886B2 (ja) * 2003-04-28 2010-06-09 株式会社ルネサステクノロジ 半導体装置の製造方法
US6958265B2 (en) * 2003-09-16 2005-10-25 Freescale Semiconductor, Inc. Semiconductor device with nanoclusters

Also Published As

Publication number Publication date
WO2006007080A2 (en) 2006-01-19
CN101006568A (zh) 2007-07-25
JP2008504681A (ja) 2008-02-14
TW200616096A (en) 2006-05-16
CN100524657C (zh) 2009-08-05
TWI396238B (zh) 2013-05-11
WO2006007080A3 (en) 2006-09-08
US7091089B2 (en) 2006-08-15
US20050287729A1 (en) 2005-12-29

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